sub_tdm.map.eqn

pci转local bus总线的应用

--pci_ad[11] is pci_ad[11]
pci_ad[11] = BIDIR(A1L321);


--pci_ad[12] is pci_ad[12]
pci_ad[12] = BIDIR(A1L721);


--pci_ad[13] is pci_ad[13]
pci_ad[13] = BIDIR(A1L131);


--pci_ad[14] is pci_ad[14]
pci_ad[14] = BIDIR(A1L531);


--pci_ad[15] is pci_ad[15]
pci_ad[15] = BIDIR(A1L931);


--pci_ad[16] is pci_ad[16]
pci_ad[16] = BIDIR(A1L341);


--pci_ad[17] is pci_ad[17]
pci_ad[17] = BIDIR(A1L741);


--pci_ad[18] is pci_ad[18]
pci_ad[18] = BIDIR(A1L151);


--pci_ad[19] is pci_ad[19]
pci_ad[19] = BIDIR(A1L551);


--pci_ad[20] is pci_ad[20]
pci_ad[20] = BIDIR(A1L951);


--pci_ad[21] is pci_ad[21]
pci_ad[21] = BIDIR(A1L361);


--pci_ad[22] is pci_ad[22]
pci_ad[22] = BIDIR(A1L761);


--pci_ad[23] is pci_ad[23]
pci_ad[23] = BIDIR(A1L171);


--pci_ad[24] is pci_ad[24]
pci_ad[24] = BIDIR(A1L571);


--pci_ad[25] is pci_ad[25]
pci_ad[25] = BIDIR(A1L971);


--pci_ad[26] is pci_ad[26]
pci_ad[26] = BIDIR(A1L381);


--pci_ad[27] is pci_ad[27]
pci_ad[27] = BIDIR(A1L781);


--pci_ad[28] is pci_ad[28]
pci_ad[28] = BIDIR(A1L191);


--pci_ad[29] is pci_ad[29]
pci_ad[29] = BIDIR(A1L591);


--pci_ad[30] is pci_ad[30]
pci_ad[30] = BIDIR(A1L991);


--pci_ad[31] is pci_ad[31]
pci_ad[31] = BIDIR(A1L302);


--pci_par is pci_par
pci_par = BIDIR(A1L812);


--sfpiic_sda is sfpiic_sda
sfpiic_sda = BIDIR(A1L344);


--iic_sda is iic_sda
iic_sda = BIDIR(A1L44);


--pi_data[0] is pi_data[0]
pi_data[0] = BIDIR(A1L952);


--pi_data[1] is pi_data[1]
pi_data[1] = BIDIR(A1L362);


--pi_data[2] is pi_data[2]
pi_data[2] = BIDIR(A1L762);


--pi_data[3] is pi_data[3]
pi_data[3] = BIDIR(A1L172);


--pi_data[4] is pi_data[4]
pi_data[4] = BIDIR(A1L572);


--pi_data[5] is pi_data[5]
pi_data[5] = BIDIR(A1L972);


--pi_data[6] is pi_data[6]
pi_data[6] = BIDIR(A1L382);


--pi_data[7] is pi_data[7]
pi_data[7] = BIDIR(A1L782);


--pi_data[8] is pi_data[8]
pi_data[8] = BIDIR(A1L192);


--pi_data[9] is pi_data[9]
pi_data[9] = BIDIR(A1L592);


--pi_data[10] is pi_data[10]
pi_data[10] = BIDIR(A1L992);


--pi_data[11] is pi_data[11]
pi_data[11] = BIDIR(A1L303);


--pi_data[12] is pi_data[12]
pi_data[12] = BIDIR(A1L703);


--pi_data[13] is pi_data[13]
pi_data[13] = BIDIR(A1L113);


--pi_data[14] is pi_data[14]
pi_data[14] = BIDIR(A1L513);


--pi_data[15] is pi_data[15]
pi_data[15] = BIDIR(A1L913);


--pi_data[16] is pi_data[16]
pi_data[16] = BIDIR(A1L323);


--pi_data[17] is pi_data[17]
pi_data[17] = BIDIR(A1L723);


--pi_data[18] is pi_data[18]
pi_data[18] = BIDIR(A1L133);


--pi_data[19] is pi_data[19]
pi_data[19] = BIDIR(A1L533);


--pi_data[20] is pi_data[20]
pi_data[20] = BIDIR(A1L933);


--pi_data[21] is pi_data[21]
pi_data[21] = BIDIR(A1L343);


--pi_data[22] is pi_data[22]
pi_data[22] = BIDIR(A1L743);


--pi_data[23] is pi_data[23]
pi_data[23] = BIDIR(A1L153);


--pi_data[24] is pi_data[24]
pi_data[24] = BIDIR(A1L553);


--pi_data[25] is pi_data[25]
pi_data[25] = BIDIR(A1L953);


--pi_data[26] is pi_data[26]
pi_data[26] = BIDIR(A1L363);


--pi_data[27] is pi_data[27]
pi_data[27] = BIDIR(A1L763);


--pi_data[28] is pi_data[28]
pi_data[28] = BIDIR(A1L173);


--pi_data[29] is pi_data[29]
pi_data[29] = BIDIR(A1L573);


--pi_data[30] is pi_data[30]
pi_data[30] = BIDIR(A1L973);


--pi_data[31] is pi_data[31]
pi_data[31] = BIDIR(A1L383);


--rtc_ad[0] is rtc_ad[0]
rtc_ad[0] = BIDIR(A1L004);


--rtc_ad[1] is rtc_ad[1]
rtc_ad[1] = BIDIR(A1L404);


--rtc_ad[2] is rtc_ad[2]
rtc_ad[2] = BIDIR(A1L804);


--rtc_ad[3] is rtc_ad[3]
rtc_ad[3] = BIDIR(A1L214);


--rtc_ad[4] is rtc_ad[4]
rtc_ad[4] = BIDIR(A1L614);


--rtc_ad[5] is rtc_ad[5]
rtc_ad[5] = BIDIR(A1L024);


--rtc_ad[6] is rtc_ad[6]
rtc_ad[6] = BIDIR(A1L424);


--rtc_ad[7] is rtc_ad[7]
rtc_ad[7] = BIDIR(A1L824);


--H1_WR_FLAG is fpga_misc:misc|IIC_SFP:IIC_SFP|WR_FLAG
--operation mode is normal

H1_WR_FLAG_lut_out = H1L44 & !H1L54 & (H1_WR_COUNT[3] # !H1L94) # !H1L44 & (H1_WR_COUNT[3] # !H1L94);
H1_WR_FLAG = DFFEAS(H1_WR_FLAG_lut_out, !GLOBAL(G1_CLK_COUNT[8]), reset_n, , , , , , );


--E1_SFP_ADDRESS[0] is fpga_misc:misc|SFP_ADDRESS[0]
--operation mode is normal

E1_SFP_ADDRESS[0]_lut_out = J1_low_ad_IR_data[4];
E1_SFP_ADDRESS[0] = DFFEAS(E1_SFP_ADDRESS[0]_lut_out, pci_clk, reset_n, , E1L25, , , , );


--E1_SFP_ADDRESS[1] is fpga_misc:misc|SFP_ADDRESS[1]
--operation mode is normal

E1_SFP_ADDRESS[1]_lut_out = J1_low_ad_IR_data[5];
E1_SFP_ADDRESS[1] = DFFEAS(E1_SFP_ADDRESS[1]_lut_out, pci_clk, reset_n, , E1L25, , , , );


--E1_SFP_ADDRESS[2] is fpga_misc:misc|SFP_ADDRESS[2]
--operation mode is normal

E1_SFP_ADDRESS[2]_lut_out = J1_low_ad_IR_data[6];
E1_SFP_ADDRESS[2] = DFFEAS(E1_SFP_ADDRESS[2]_lut_out, pci_clk, reset_n, , E1L25, , , , );


--reset_n is reset_n
reset_n = INPUT();


--E1_reset_reg[0] is fpga_misc:misc|reset_reg[0]
--operation mode is normal

E1_reset_reg[0]_lut_out = !J1_low_ad_IR_data[0];
E1_reset_reg[0] = DFFEAS(E1_reset_reg[0]_lut_out, pci_clk, reset_n, , E1L963, , , , );


--D1_reset_8245 is RESET_GEN:RESET_GEN|reset_8245
--operation mode is normal

D1_reset_8245 = reset_n & (!E1_reset_reg[0]);


--E1_reset_reg[3] is fpga_misc:misc|reset_reg[3]
--operation mode is normal

E1_reset_reg[3]_lut_out = !J1_low_ad_IR_data[3];
E1_reset_reg[3] = DFFEAS(E1_reset_reg[3]_lut_out, pci_clk, reset_n, , E1L963, , , , );


--D1_reset_5248 is RESET_GEN:RESET_GEN|reset_5248
--operation mode is normal

D1_reset_5248 = reset_n & (!E1_reset_reg[3]);


--E1_reset_reg[1] is fpga_misc:misc|reset_reg[1]
--operation mode is normal

E1_reset_reg[1]_lut_out = !J1_low_ad_IR_data[1];
E1_reset_reg[1] = DFFEAS(E1_reset_reg[1]_lut_out, pci_clk, reset_n, , E1L963, , , , );


--D1_reset_5650 is RESET_GEN:RESET_GEN|reset_5650
--operation mode is normal

D1_reset_5650 = reset_n & (!E1_reset_reg[1]);


--E1_reset_reg[2] is fpga_misc:misc|reset_reg[2]
--operation mode is normal

E1_reset_reg[2]_lut_out = !J1_low_ad_IR_data[2];
E1_reset_reg[2] = DFFEAS(E1_reset_reg[2]_lut_out, pci_clk, reset_n, , E1L963, , , , );


--D1_reset_5464 is RESET_GEN:RESET_GEN|reset_5464
--operation mode is normal

D1_reset_5464 = reset_n & (!E1_reset_reg[2]);


--E1_reset_reg[4] is fpga_misc:misc|reset_reg[4]
--operation mode is normal

E1_reset_reg[4]_lut_out = !J1_low_ad_IR_data[4];
E1_reset_reg[4] = DFFEAS(E1_reset_reg[4]_lut_out, pci_clk, reset_n, , E1L963, , , , );


--D1_reset_rs232 is RESET_GEN:RESET_GEN|reset_rs232
--operation mode is normal

D1_reset_rs232 = reset_n & (!E1_reset_reg[4]);


--E1_reset_reg[5] is fpga_misc:misc|reset_reg[5]
--operation mode is normal

E1_reset_reg[5]_lut_out = !J1_low_ad_IR_data[5];
E1_reset_reg[5] = DFFEAS(E1_reset_reg[5]_lut_out, pci_clk, reset_n, , E1L963, , , , );


--D1_reset_zl is RESET_GEN:RESET_GEN|reset_zl
--operation mode is normal

D1_reset_zl = reset_n & (!E1_reset_reg[5]);


--E1_reset_reg[6] is fpga_misc:misc|reset_reg[6]
--operation mode is normal

E1_reset_reg[6]_lut_out = VCC;
E1_reset_reg[6] = DFFEAS(E1_reset_reg[6]_lut_out, pci_clk, reset_n, , E1L973, , , , );


--D1_dog_rst is RESET_GEN:RESET_GEN|dog_rst
--operation mode is normal

D1_dog_rst_lut_out = D1L17 & D1L27 & D1L37;
D1_dog_rst = DFFEAS(D1_dog_rst_lut_out, D1_count[24], !D1_dog_reset, , , , , , );


--D1_reset_sof is RESET_GEN:RESET_GEN|reset_sof
--operation mode is normal

D1_reset_sof = !E1_reset_reg[6] & !D1_dog_rst;


--C1_pi_addr[0] is parallel_interface:Parallel_interface|pi_addr[0]
--operation mode is normal

C1_pi_addr[0]_lut_out = M1_lt_adr[2];
C1_pi_addr[0] = DFFEAS(C1_pi_addr[0]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[1] is parallel_interface:Parallel_interface|pi_addr[1]
--operation mode is normal

C1_pi_addr[1]_lut_out = M1_lt_adr[3];
C1_pi_addr[1] = DFFEAS(C1_pi_addr[1]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[2] is parallel_interface:Parallel_interface|pi_addr[2]
--operation mode is normal

C1_pi_addr[2]_lut_out = M1_lt_adr[4];
C1_pi_addr[2] = DFFEAS(C1_pi_addr[2]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[3] is parallel_interface:Parallel_interface|pi_addr[3]
--operation mode is normal

C1_pi_addr[3]_lut_out = M1_lt_adr[5];
C1_pi_addr[3] = DFFEAS(C1_pi_addr[3]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[4] is parallel_interface:Parallel_interface|pi_addr[4]
--operation mode is normal

C1_pi_addr[4]_lut_out = M1_lt_adr[6];
C1_pi_addr[4] = DFFEAS(C1_pi_addr[4]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[5] is parallel_interface:Parallel_interface|pi_addr[5]
--operation mode is normal

C1_pi_addr[5]_lut_out = M1_lt_adr[7];
C1_pi_addr[5] = DFFEAS(C1_pi_addr[5]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[6] is parallel_interface:Parallel_interface|pi_addr[6]
--operation mode is normal

C1_pi_addr[6]_lut_out = M1_lt_adr[8];
C1_pi_addr[6] = DFFEAS(C1_pi_addr[6]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[7] is parallel_interface:Parallel_interface|pi_addr[7]
--operation mode is normal

C1_pi_addr[7]_lut_out = M1_lt_adr[9];
C1_pi_addr[7] = DFFEAS(C1_pi_addr[7]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[8] is parallel_interface:Parallel_interface|pi_addr[8]
--operation mode is normal

C1_pi_addr[8]_lut_out = M1_lt_adr[10];
C1_pi_addr[8] = DFFEAS(C1_pi_addr[8]_lut_out, pci_clk, reset_n, , E1L054, , , , );


--C1_pi_addr[9] is parallel_interface:Parallel_interface|pi_addr[9]
--operation mode is normal

C1_pi_addr[9]_lut_out = M1_no_op_reg[3] & J1_ad_ir_address[11];
C1_pi_addr[9] = DFFEAS(C1_pi_addr[9]_lut_out, pci_clk, reset_n, , E1L054, , , , );