sub_tdm.map.eqn

pci转local bus总线的应用

--operation mode is arithmetic

D1L14 = CARRY(!D1L93 # !D1_count[19]);


--G1_WR_COUNT[3] is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[3]
--operation mode is arithmetic

G1_WR_COUNT[3]_carry_eqn = G1L25;
G1_WR_COUNT[3]_lut_out = G1_WR_COUNT[3] $ (G1_WR_COUNT[3]_carry_eqn);
G1_WR_COUNT[3] = DFFEAS(G1_WR_COUNT[3]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , , , , !G1_IIC_WR_STATE.WRITE_READ, );

--G1L45 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[3]~221
--operation mode is arithmetic

G1L45 = CARRY(!G1L25 # !G1_WR_COUNT[3]);


--G1_WR_COUNT[1] is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[1]
--operation mode is arithmetic

G1_WR_COUNT[1]_carry_eqn = G1L84;
G1_WR_COUNT[1]_lut_out = G1_WR_COUNT[1] $ (G1_WR_COUNT[1]_carry_eqn);
G1_WR_COUNT[1] = DFFEAS(G1_WR_COUNT[1]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , , , , !G1_IIC_WR_STATE.WRITE_READ, );

--G1L05 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[1]~225
--operation mode is arithmetic

G1L05 = CARRY(!G1L84 # !G1_WR_COUNT[1]);


--G1_WR_COUNT[5] is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[5]
--operation mode is arithmetic

G1_WR_COUNT[5]_carry_eqn = G1L65;
G1_WR_COUNT[5]_lut_out = G1_WR_COUNT[5] $ (G1_WR_COUNT[5]_carry_eqn);
G1_WR_COUNT[5] = DFFEAS(G1_WR_COUNT[5]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , , , , !G1_IIC_WR_STATE.WRITE_READ, );

--G1L85 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[5]~229
--operation mode is arithmetic

G1L85 = CARRY(!G1L65 # !G1_WR_COUNT[5]);


--G1_WR_COUNT[6] is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[6]
--operation mode is normal

G1_WR_COUNT[6]_carry_eqn = G1L85;
G1_WR_COUNT[6]_lut_out = G1_WR_COUNT[6] $ (!G1_WR_COUNT[6]_carry_eqn);
G1_WR_COUNT[6] = DFFEAS(G1_WR_COUNT[6]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , , , , !G1_IIC_WR_STATE.WRITE_READ, );


--G1_WR_COUNT[2] is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[2]
--operation mode is arithmetic

G1_WR_COUNT[2]_carry_eqn = G1L05;
G1_WR_COUNT[2]_lut_out = G1_WR_COUNT[2] $ (!G1_WR_COUNT[2]_carry_eqn);
G1_WR_COUNT[2] = DFFEAS(G1_WR_COUNT[2]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , , , , !G1_IIC_WR_STATE.WRITE_READ, );

--G1L25 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[2]~237
--operation mode is arithmetic

G1L25 = CARRY(G1_WR_COUNT[2] & (!G1L05));


--G1_WR_COUNT[4] is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[4]
--operation mode is arithmetic

G1_WR_COUNT[4]_carry_eqn = G1L45;
G1_WR_COUNT[4]_lut_out = G1_WR_COUNT[4] $ (!G1_WR_COUNT[4]_carry_eqn);
G1_WR_COUNT[4] = DFFEAS(G1_WR_COUNT[4]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , , , , !G1_IIC_WR_STATE.WRITE_READ, );

--G1L65 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[4]~241
--operation mode is arithmetic

G1L65 = CARRY(G1_WR_COUNT[4] & (!G1L45));


--G1_WR_COUNT[0] is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[0]
--operation mode is arithmetic

G1_WR_COUNT[0]_lut_out = !G1_WR_COUNT[0];
G1_WR_COUNT[0] = DFFEAS(G1_WR_COUNT[0]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , , , , !G1_IIC_WR_STATE.WRITE_READ, );

--G1L84 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[0]~245
--operation mode is arithmetic

G1L84 = CARRY(G1_WR_COUNT[0]);


--G1_WR_START is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_START
--operation mode is normal

G1_WR_START_lut_out = E1_IIC_ACCESS_INIT # G1_WR_START_STATE.00;
G1_WR_START = DFFEAS(G1_WR_START_lut_out, pci_clk, VCC, , , , , !reset_n, );


--G1_CLK_COUNT[4] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[4]
--operation mode is arithmetic

G1_CLK_COUNT[4]_carry_eqn = G1L9;
G1_CLK_COUNT[4]_lut_out = G1_CLK_COUNT[4] $ (!G1_CLK_COUNT[4]_carry_eqn);
G1_CLK_COUNT[4] = DFFEAS(G1_CLK_COUNT[4]_lut_out, pci_clk, VCC, , , , , !reset_n, );

--G1L11 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[4]~136
--operation mode is arithmetic

G1L11 = CARRY(G1_CLK_COUNT[4] & (!G1L9));


--D1_count[18] is RESET_GEN:RESET_GEN|count[18]
--operation mode is arithmetic

D1_count[18]_carry_eqn = D1L73;
D1_count[18]_lut_out = D1_count[18] $ (!D1_count[18]_carry_eqn);
D1_count[18] = DFFEAS(D1_count[18]_lut_out, pci_clk, VCC, , , , , , );

--D1L93 is RESET_GEN:RESET_GEN|count[18]~200
--operation mode is arithmetic

D1L93 = CARRY(D1_count[18] & (!D1L73));


--E1_IIC_ACCESS_INIT is fpga_misc:misc|IIC_ACCESS_INIT
--operation mode is normal

E1_IIC_ACCESS_INIT_lut_out = E1_IIC_ACCESS_INIT # !M1_lt_dxfrn & M1L802 & !E1L933;
E1_IIC_ACCESS_INIT = DFFEAS(E1_IIC_ACCESS_INIT_lut_out, pci_clk, reset_n, , , , , !E1_cstate.WRITE, );


--G1_CLK_COUNT[3] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[3]
--operation mode is arithmetic

G1_CLK_COUNT[3]_carry_eqn = G1L7;
G1_CLK_COUNT[3]_lut_out = G1_CLK_COUNT[3] $ (G1_CLK_COUNT[3]_carry_eqn);
G1_CLK_COUNT[3] = DFFEAS(G1_CLK_COUNT[3]_lut_out, pci_clk, VCC, , , , , !reset_n, );

--G1L9 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[3]~140
--operation mode is arithmetic

G1L9 = CARRY(!G1L7 # !G1_CLK_COUNT[3]);


--H1_WR_START_STATE.01 is fpga_misc:misc|IIC_SFP:IIC_SFP|WR_START_STATE.01
--operation mode is normal

H1_WR_START_STATE.01_lut_out = G1_CLK_COUNT[8] & (E1_SFPIIC_ACCESS_INIT & !H1_WR_START_STATE.00) # !G1_CLK_COUNT[8] & (H1_WR_START_STATE.01 # E1_SFPIIC_ACCESS_INIT & !H1_WR_START_STATE.00);
H1_WR_START_STATE.01 = DFFEAS(H1_WR_START_STATE.01_lut_out, pci_clk, VCC, , , , , !reset_n, );


--D1_count[17] is RESET_GEN:RESET_GEN|count[17]
--operation mode is arithmetic

D1_count[17]_carry_eqn = D1L53;
D1_count[17]_lut_out = D1_count[17] $ (D1_count[17]_carry_eqn);
D1_count[17] = DFFEAS(D1_count[17]_lut_out, pci_clk, VCC, , , , , , );

--D1L73 is RESET_GEN:RESET_GEN|count[17]~204
--operation mode is arithmetic

D1L73 = CARRY(!D1L53 # !D1_count[17]);


--G1_CLK_COUNT[2] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[2]
--operation mode is arithmetic

G1_CLK_COUNT[2]_carry_eqn = G1L5;
G1_CLK_COUNT[2]_lut_out = G1_CLK_COUNT[2] $ (!G1_CLK_COUNT[2]_carry_eqn);
G1_CLK_COUNT[2] = DFFEAS(G1_CLK_COUNT[2]_lut_out, pci_clk, VCC, , , , , !reset_n, );

--G1L7 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[2]~144
--operation mode is arithmetic

G1L7 = CARRY(G1_CLK_COUNT[2] & (!G1L5));


--D1_count[16] is RESET_GEN:RESET_GEN|count[16]
--operation mode is arithmetic

D1_count[16]_carry_eqn = D1L33;
D1_count[16]_lut_out = D1_count[16] $ (!D1_count[16]_carry_eqn);
D1_count[16] = DFFEAS(D1_count[16]_lut_out, pci_clk, VCC, , , , , , );

--D1L53 is RESET_GEN:RESET_GEN|count[16]~208
--operation mode is arithmetic

D1L53 = CARRY(D1_count[16] & (!D1L33));


--C1_ot_cnt[0] is parallel_interface:Parallel_interface|ot_cnt[0]
--operation mode is normal

C1_ot_cnt[0]_lut_out = C1_ot_cnt[0] $ C1L591;
C1_ot_cnt[0] = DFFEAS(C1_ot_cnt[0]_lut_out, pci_clk, reset_n, , C1L802, , , , );


--G1_WR_START_STATE.01 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_START_STATE.01
--operation mode is normal

G1_WR_START_STATE.01_lut_out = G1_CLK_COUNT[8] & (E1_IIC_ACCESS_INIT & !G1_WR_START_STATE.00) # !G1_CLK_COUNT[8] & (G1_WR_START_STATE.01 # E1_IIC_ACCESS_INIT & !G1_WR_START_STATE.00);
G1_WR_START_STATE.01 = DFFEAS(G1_WR_START_STATE.01_lut_out, pci_clk, VCC, , , , , !reset_n, );


--G1_CLK_COUNT[1] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[1]
--operation mode is arithmetic

G1_CLK_COUNT[1]_carry_eqn = G1L3;
G1_CLK_COUNT[1]_lut_out = G1_CLK_COUNT[1] $ (G1_CLK_COUNT[1]_carry_eqn);
G1_CLK_COUNT[1] = DFFEAS(G1_CLK_COUNT[1]_lut_out, pci_clk, VCC, , , , , !reset_n, );

--G1L5 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[1]~148
--operation mode is arithmetic

G1L5 = CARRY(!G1L3 # !G1_CLK_COUNT[1]);


--D1_count[15] is RESET_GEN:RESET_GEN|count[15]
--operation mode is arithmetic

D1_count[15]_carry_eqn = D1L13;
D1_count[15]_lut_out = D1_count[15] $ (D1_count[15]_carry_eqn);
D1_count[15] = DFFEAS(D1_count[15]_lut_out, pci_clk, VCC, , , , , , );

--D1L33 is RESET_GEN:RESET_GEN|count[15]~212
--operation mode is arithmetic

D1L33 = CARRY(!D1L13 # !D1_count[15]);


--G1_CLK_COUNT[0] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[0]
--operation mode is arithmetic

G1_CLK_COUNT[0]_lut_out = !G1_CLK_COUNT[0];
G1_CLK_COUNT[0] = DFFEAS(G1_CLK_COUNT[0]_lut_out, pci_clk, VCC, , , , , !reset_n, );

--G1L3 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[0]~152
--operation mode is arithmetic

G1L3 = CARRY(G1_CLK_COUNT[0]);


--D1_count[14] is RESET_GEN:RESET_GEN|count[14]
--operation mode is arithmetic

D1_count[14]_carry_eqn = D1L92;
D1_count[14]_lut_out = D1_count[14] $ (!D1_count[14]_carry_eqn);
D1_count[14] = DFFEAS(D1_count[14]_lut_out, pci_clk, VCC, , , , , , );

--D1L13 is RESET_GEN:RESET_GEN|count[14]~216
--operation mode is arithmetic

D1L13 = CARRY(D1_count[14] & (!D1L92));


--D1_count[13] is RESET_GEN:RESET_GEN|count[13]
--operation mode is arithmetic

D1_count[13]_carry_eqn = D1L72;
D1_count[13]_lut_out = D1_count[13] $ (D1_count[13]_carry_eqn);
D1_count[13] = DFFEAS(D1_count[13]_lut_out, pci_clk, VCC, , , , , , );

--D1L92 is RESET_GEN:RESET_GEN|count[13]~220
--operation mode is arithmetic

D1L92 = CARRY(!D1L72 # !D1_count[13]);


--D1_count[12] is RESET_GEN:RESET_GEN|count[12]
--operation mode is arithmetic

D1_count[12]_carry_eqn = D1L52;
D1_count[12]_lut_out = D1_count[12] $ (!D1_count[12]_carry_eqn);
D1_count[12] = DFFEAS(D1_count[12]_lut_out, pci_clk, VCC, , , , , , );

--D1L72 is RESET_GEN:RESET_GEN|count[12]~224
--operation mode is arithmetic

D1L72 = CARRY(D1_count[12] & (!D1L52));


--D1_count[11] is RESET_GEN:RESET_GEN|count[11]
--operation mode is arithmetic

D1_count[11]_carry_eqn = D1L32;
D1_count[11]_lut_out = D1_count[11] $ (D1_count[11]_carry_eqn);
D1_count[11] = DFFEAS(D1_count[11]_lut_out, pci_clk, VCC, , , , , , );

--D1L52 is RESET_GEN:RESET_GEN|count[11]~228
--operation mode is arithmetic

D1L52 = CARRY(!D1L32 # !D1_count[11]);


--D1_count[10] is RESET_GEN:RESET_GEN|count[10]
--operation mode is arithmetic

D1_count[10]_carry_eqn = D1L12;
D1_count[10]_lut_out = D1_count[10] $ (!D1_count[10]_carry_eqn);
D1_count[10] = DFFEAS(D1_count[10]_lut_out, pci_clk, VCC, , , , , , );

--D1L32 is RESET_GEN:RESET_GEN|count[10]~232
--operation mode is arithmetic

D1L32 = CARRY(D1_count[10] & (!D1L12));


--D1_count[9] is RESET_GEN:RESET_GEN|count[9]
--operation mode is arithmetic

D1_count[9]_carry_eqn = D1L91;
D1_count[9]_lut_out = D1_count[9] $ (D1_count[9]_carry_eqn);
D1_count[9] = DFFEAS(D1_count[9]_lut_out, pci_clk, VCC, , , , , , );

--D1L12 is RESET_GEN:RESET_GEN|count[9]~236
--operation mode is arithmetic

D1L12 = CARRY(!D1L91 # !D1_count[9]);


--G1_W_DATA_BUF[31] is fpga_misc:misc|IIC_RS232:IIC_RS232|W_DATA_BUF[31]
--operation mode is normal

G1_W_DATA_BUF[31]_lut_out = E1_IIC_DATA_IN[15] # !E1_IIC_W_R;
G1_W_DATA_BUF[31] = DFFEAS(G1_W_DATA_BUF[31]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , G1L18, G1_W_DATA_BUF[30], , , G1_IIC_WR_STATE.WRITE_READ);


--D1_count[8] is RESET_GEN:RESET_GEN|count[8]
--operation mode is arithmetic

D1_count[8]_carry_eqn = D1L71;
D1_count[8]_lut_out = D1_count[8] $ (!D1_count[8]_carry_eqn);
D1_count[8] = DFFEAS(D1_count[8]_lut_out, pci_clk, VCC, , , , , , );

--D1L91 is RESET_GEN:RESET_GEN|count[8]~240
--operation mode is arithmetic

D1L91 = CARRY(D1_count[8] & (!D1L71));


--D1_count[7] is RESET_GEN:RESET_GEN|count[7]
--operation mode is arithmetic

D1_count[7]_carry_eqn = D1L51;
D1_count[7]_lut_out = D1_count[7] $ (D1_count[7]_carry_eqn);
D1_count[7] = DFFEAS(D1_count[7]_lut_out, pci_clk, VCC, , , , , , );

--D1L71 is RESET_GEN:RESET_GEN|count[7]~244
--operation mode is arithmetic

D1L71 = CARRY(!D1L51 # !D1_count[7]);


--D1_count[6] is RESET_GEN:RESET_GEN|count[6]
--operation mode is arithmetic

D1_count[6]_carry_eqn = D1L31;
D1_count[6]_lut_out = D1_count[6] $ (!D1_count[6]_carry_eqn);
D1_count[6] = DFFEAS(D1_count[6]_lut_out, pci_clk, VCC, , , , , , );

--D1L51 is RESET_GEN:RESET_GEN|count[6]~248
--operation mode is arithmetic

D1L51 = CARRY(D1_count[6] & (!D1L31));


--D1_count[5] is RESET_GEN:RESET_GEN|count[5]
--operation mode is arithmetic

D1_count[5]_carry_eqn = D1L11;
D1_count[5]_lut_out = D1_count[5] $ (D1_count[5]_carry_eqn);
D1_count[5] = DFFEAS(D1_count[5]_lut_out, pci_clk, VCC, , , , , , );

--D1L31 is RESET_GEN:RESET_GEN|count[5]~252
--operation mode is arithmetic

D1L31 = CARRY(!D1L11 # !D1_count[5]);


--D1_count[4] is RESET_GEN:RESET_GEN|count[4]
--operation mode is arithmetic

D1_count[4]_carry_eqn = D1L9;
D1_count[4]_lut_out = D1_count[4] $ (!D1_count[4]_carry_eqn);
D1_count[4] = DFFEAS(D1_count[4]_lut_out, pci_clk, VCC, , , , , , );

--D1L11 is RESET_GEN:RESET_GEN|count[4]~256
--operation mode is arithmetic

D1L11 = CARRY(D1_count[4] & (!D1L9));


--D1_count[3] is RESET_GEN:RESET_GEN|count[3]
--operation mode is arithmetic

D1_count[3]_carry_eqn = D1L7;
D1_count[3]_lut_out = D1_count[3] $ (D1_count[3]_carry_eqn);
D1_count[3] = DFFEAS(D1_count[3]_lut_out, pci_clk, VCC, , , , , , );

--D1L9 is RESET_GEN:RESET_GEN|count[3]~260
--operation mode is arithmetic

D1L9 = CARRY(!D1L7 # !D1_count[3]);


--D1_count[2] is RESET_GEN:RESET_GEN|count[2]
--operation mode is arithmetic

D1_count[2]_carry_eqn = D1L5;
D1_count[2]_lut_out = D1_count[2] $ (!D1_count[2]_carry_eqn);
D1_count[2] = DFFEAS(D1_count[2]_lut_out, pci_clk, VCC, , , , , , );

--D1L7 is RESET_GEN:RESET_GEN|count[2]~264
--operation mode is arithmetic

D1L7 = CARRY(D1_count[2] & (!D1L5));


--D1_count[1] is RESET_GEN:RESET_GEN|count[1]
--operation mode is arithmetic

D1_count[1]_carry_eqn = D1L3;
D1_count[1]_lut_out = D1_count[1] $ (D1_count[1]_carry_eqn);
D1_count[1] = DFFEAS(D1_count[1]_lut_out, pci_clk, VCC, , , , , , );

--D1L5 is RESET_GEN:RESET_GEN|count[1]~268
--operation mode is arithmetic

D1L5 = CARRY(!D1L3 # !D1_count[1]);


--D1_count[0] is RESET_GEN:RESET_GEN|count[0]
--operation mode is arithmetic

D1_count[0]_lut_out = !D1_count[0];
D1_count[0] = DFFEAS(D1_count[0]_lut_out, pci_clk, VCC, , , , , , );

--D1L3 is RESET_GEN:RESET_GEN|count[0]~272
--operation mode is arithmetic

D1L3 = CARRY(D1_count[0]);


--H1_W_DATA_BUF[22] is fpga_misc:misc|IIC_SFP:IIC_SFP|W_DATA_BUF[22]
--operation mode is normal

H1_W_DATA_BUF[22]_lut_out = E1_SFPIIC_DATA_IN[7] # !E1_SFPIIC_W_R;
H1_W_DATA_BUF[22] = DFFEAS(H1_W_DATA_BUF[22]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , H1L66, H1_W_DATA_BUF[21], , , H1_IIC_WR_STATE.WRITE_READ);


--G1_W_DATA_BUF[22] is fpga_misc:misc|IIC_RS232:IIC_RS232|W_DATA_BUF[22]
--operation mode is normal

G1_W_DATA_BUF[22]_lut_out = E1_IIC_DATA_IN[7] # !E1_IIC_W_R;
G1_W_DATA_BUF[22] = DFFEAS(G1_W_DATA_BUF[22]_lut_out, GLOBAL(G1_CLK_COUNT[7]), reset_n, , G1L18, G1_W_DATA_BUF[21], , , G1_IIC_WR_STATE.WRITE_READ);