+

CPLD的小程序集合

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Jun 24 23:16:59 2008 " "Info: Processing started: Tue Jun 24 23:16:59 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off sub -c sub " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off sub -c sub" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "b\[1\] c\[7\] 11.608 ns Longest " "Info: Longest tpd from source pin \"b\[1\]\" to destination pin \"c\[7\]\" is 11.608 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns b\[1\] 1 PIN PIN_21 3 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_21; Fanout = 3; PIN Node = 'b\[1\]'" {  } { { "d:/altera/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/win/TimingClosureFloorplan.fld" "" "" { b[1] } "NODE_NAME" } } { "sub.vhd" "" { Text "D:/EPM240/基础实验/减法器/sub.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.553 ns) + CELL(0.978 ns) 4.663 ns c_tmp\[1\]~11 2 COMB LC_X2_Y3_N1 2 " "Info: 2: + IC(2.553 ns) + CELL(0.978 ns) = 4.663 ns; Loc. = LC_X2_Y3_N1; Fanout = 2; COMB Node = 'c_tmp\[1\]~11'" {  } { { "d:/altera/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/win/TimingClosureFloorplan.fld" "" "3.531 ns" { b[1] c_tmp[1]~11 } "NODE_NAME" } } { "sub.vhd" "" { Text "D:/EPM240/基础实验/减法器/sub.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.815 ns) 5.478 ns c_tmp\[2\]~12 3 COMB LC_X2_Y3_N2 7 " "Info: 3: + IC(0.000 ns) + CELL(0.815 ns) = 5.478 ns; Loc. = LC_X2_Y3_N2; Fanout = 7; COMB Node = 'c_tmp\[2\]~12'" {  } { { "d:/altera/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/win/TimingClosureFloorplan.fld" "" "0.815 ns" { c_tmp[1]~11 c_tmp[2]~12 } "NODE_NAME" } } { "sub.vhd" "" { Text "D:/EPM240/基础实验/减法器/sub.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.300 ns) + CELL(0.511 ns) 7.289 ns Mux0~3 4 COMB LC_X2_Y3_N5 1 " "Info: 4: + IC(1.300 ns) + CELL(0.511 ns) = 7.289 ns; Loc. = LC_X2_Y3_N5; Fanout = 1; COMB Node = 'Mux0~3'" {  } { { "d:/altera/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/win/TimingClosureFloorplan.fld" "" "1.811 ns" { c_tmp[2]~12 Mux0~3 } "NODE_NAME" } } { "sub.vhd" "" { Text "D:/EPM240/基础实验/减法器/sub.vhd" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.997 ns) + CELL(2.322 ns) 11.608 ns c\[7\] 5 PIN PIN_2 0 " "Info: 5: + IC(1.997 ns) + CELL(2.322 ns) = 11.608 ns; Loc. = PIN_2; Fanout = 0; PIN Node = 'c\[7\]'" {  } { { "d:/altera/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/win/TimingClosureFloorplan.fld" "" "4.319 ns" { Mux0~3 c[7] } "NODE_NAME" } } { "sub.vhd" "" { Text "D:/EPM240/基础实验/减法器/sub.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.758 ns ( 49.60 % ) " "Info: Total cell delay = 5.758 ns ( 49.60 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.850 ns ( 50.40 % ) " "Info: Total interconnect delay = 5.850 ns ( 50.40 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/win/TimingClosureFloorplan.fld" "" "11.608 ns" { b[1] c_tmp[1]~11 c_tmp[2]~12 Mux0~3 c[7] } "NODE_NAME" } } { "d:/altera/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/win/Technology_Viewer.qrui" "11.608 ns" { b[1] b[1]~combout c_tmp[1]~11 c_tmp[2]~12 Mux0~3 c[7] } { 0.000ns 0.000ns 2.553ns 0.000ns 1.300ns 1.997ns } { 0.000ns 1.132ns 0.978ns 0.815ns 0.511ns 2.322ns } } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Jun 24 23:16:59 2008 " "Info: Processing ended: Tue Jun 24 23:16:59 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}