yinyue.fit.qmsg

来自「CPLD的小程序集合」· QMSG 代码 · 共 35 行 · 第 1/2 页

{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_HEADER" "" "Info: Started processing fast register assignments" {  } {  } 0 0 "Started processing fast register assignments" 0 0}
{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_FOOTER" "" "Info: Finished processing fast register assignments" {  } {  } 0 0 "Finished processing fast register assignments" 0 0}
{ "Extra Info" "IFSAC_FSAC_FINISH_LUT_PACKING" "00:00:00 " "Extra Info: Finished moving registers into LUTs: elapsed time is 00:00:00" {  } {  } 1 0 "Finished moving registers into LUTs: elapsed time is %1!s!" 1 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "00:00:00 " "Info: Finished register packing: elapsed time is 00:00:00" {  } {  } 0 0 "Finished register packing: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:02 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:02" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "17.514 ns register register " "Info: Estimated most critical path is register to register delay of 17.514 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns COUNTER\[1\] 1 REG LAB_X6_Y3 38 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X6_Y3; Fanout = 38; REG Node = 'COUNTER\[1\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { COUNTER[1] } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 66 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.526 ns) + CELL(0.511 ns) 3.037 ns Equal6~58 2 COMB LAB_X2_Y2 2 " "Info: 2: + IC(2.526 ns) + CELL(0.511 ns) = 3.037 ns; Loc. = LAB_X2_Y2; Fanout = 2; COMB Node = 'Equal6~58'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.037 ns" { COUNTER[1] Equal6~58 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 67 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.558 ns) + CELL(0.740 ns) 5.335 ns Mux5~693 3 COMB LAB_X3_Y3 1 " "Info: 3: + IC(1.558 ns) + CELL(0.740 ns) = 5.335 ns; Loc. = LAB_X3_Y3; Fanout = 1; COMB Node = 'Mux5~693'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.298 ns" { Equal6~58 Mux5~693 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 72 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.980 ns) + CELL(0.200 ns) 6.515 ns Mux5~694 4 COMB LAB_X3_Y3 2 " "Info: 4: + IC(0.980 ns) + CELL(0.200 ns) = 6.515 ns; Loc. = LAB_X3_Y3; Fanout = 2; COMB Node = 'Mux5~694'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { Mux5~693 Mux5~694 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 72 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.840 ns) + CELL(0.740 ns) 8.095 ns Mux5~696 5 COMB LAB_X4_Y3 2 " "Info: 5: + IC(0.840 ns) + CELL(0.740 ns) = 8.095 ns; Loc. = LAB_X4_Y3; Fanout = 2; COMB Node = 'Mux5~696'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.580 ns" { Mux5~694 Mux5~696 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 72 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.440 ns) + CELL(0.740 ns) 9.275 ns Mux18~510 6 COMB LAB_X4_Y3 3 " "Info: 6: + IC(0.440 ns) + CELL(0.740 ns) = 9.275 ns; Loc. = LAB_X4_Y3; Fanout = 3; COMB Node = 'Mux18~510'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { Mux5~696 Mux18~510 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 145 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.360 ns) + CELL(0.914 ns) 11.549 ns Mux18~512 7 COMB LAB_X5_Y2 4 " "Info: 7: + IC(1.360 ns) + CELL(0.914 ns) = 11.549 ns; Loc. = LAB_X5_Y2; Fanout = 4; COMB Node = 'Mux18~512'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.274 ns" { Mux18~510 Mux18~512 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 145 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.980 ns) + CELL(0.200 ns) 12.729 ns Mux18~513 8 COMB LAB_X5_Y2 1 " "Info: 8: + IC(0.980 ns) + CELL(0.200 ns) = 12.729 ns; Loc. = LAB_X5_Y2; Fanout = 1; COMB Node = 'Mux18~513'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { Mux18~512 Mux18~513 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 145 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.725 ns) + CELL(0.511 ns) 14.965 ns Mux18~514 9 COMB LAB_X3_Y2 2 " "Info: 9: + IC(1.725 ns) + CELL(0.511 ns) = 14.965 ns; Loc. = LAB_X3_Y2; Fanout = 2; COMB Node = 'Mux18~514'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.236 ns" { Mux18~513 Mux18~514 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 145 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.980 ns) + CELL(0.200 ns) 16.145 ns Mux18~515 10 COMB LAB_X3_Y2 1 " "Info: 10: + IC(0.980 ns) + CELL(0.200 ns) = 16.145 ns; Loc. = LAB_X3_Y2; Fanout = 1; COMB Node = 'Mux18~515'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.180 ns" { Mux18~514 Mux18~515 } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 145 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.089 ns) + CELL(0.280 ns) 17.514 ns DRIVER\[1\] 11 REG LAB_X3_Y2 4 " "Info: 11: + IC(1.089 ns) + CELL(0.280 ns) = 17.514 ns; Loc. = LAB_X3_Y2; Fanout = 4; REG Node = 'DRIVER\[1\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.369 ns" { Mux18~515 DRIVER[1] } "NODE_NAME" } } { "yinyue.vhd" "" { Text "E:/EPM240程序/BELL/yinyue.vhd" 41 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.036 ns ( 28.75 % ) " "Info: Total cell delay = 5.036 ns ( 28.75 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "12.478 ns ( 71.25 % ) " "Info: Total interconnect delay = 12.478 ns ( 71.25 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "17.514 ns" { COUNTER[1] Equal6~58 Mux5~693 Mux5~694 Mux5~696 Mux18~510 Mux18~512 Mux18~513 Mux18~514 Mux18~515 DRIVER[1] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "18 18 " "Info: Average interconnect usage is 18% of the available device resources. Peak interconnect usage is 18%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "x0_y0 x8_y5 " "Info: The peak interconnect region extends from location x0_y0 to location x8_y5" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Info: Fitter routing operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Feb 12 20:11:02 2009 " "Info: Processing ended: Thu Feb 12 20:11:02 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "E:/EPM240程序/BELL/yinyue.fit.smsg " "Info: Generated suppressed messages file E:/EPM240程序/BELL/yinyue.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}