init_c54.asm

可以在ti tms320vc5402处理器上运行的ucos程序

;*******************************************************************************
; Module Name:      Initialize the C54x DSP chip
;
;******************************** GLOBALS **************************************
; E X T E R N A L   D E F I N I T I O N S
;
;   MODULE ENTRY POINT:
        .def        _INIT_C54
;
; E X T E R N A L   R E F E R E N C E S
        .mmregs

;********************************* LOCALS *************************************
; DEFINITIONS:

; PMST_INIT: See 4.1.2 of the CPU and Peripherals manual.
;    IPTR (bit 15-7) -  011111111          Run-time Interrupt vector location = 0xff80 (for now)
;    MP/~MC (bit 6)  -           1         Turn off internal Instruction ROM (use RAM)
;    OVLY   (bit 5)  -            1        Turn on internal RAM
;    AVIS   (bit 4)  -             0       Address visibility off
;    DROM   (bit 3)  -              0      Turn off internal Data ROM  
;    CLKOFF (bit 2)  -               0     Clockout  enabled
;    SMUL   (bit 1)  -                1    Saturate before multiply on MAC
;    SST    (bit 0)  -                 0   Do not saturate before store
;                      -----------------
;                       1111 1111 1110 0010 = 0x77E2
PMST_INIT        .set        0x7Fe2

; BSCR_INIT: See 10.3.2 of the CPU and Peripherals manual.
;    BNKCMP (bit 15-12) - 0000             No bank switching
;    PS-DS  (bit 11)    -     0            Don't insert cycles between
;                                          PS-DS accesses
;    reserved (bit 12-2)-      xxxxxxxxx
;    BH     (bit 1)     -               0  Disable bus holder
;    EXIO   (bit 0)     -                1 turn off external-bus-off
;                         -----------------        
;                          0000000000000001
BSCR_INIT        .set        1

; SWWSR_INIT:
;    XPA   (bit 15)     - x                Don't care since one mem chip
;    I/O   (bits 14-12) -  111             We don't use the IO port, but set to max wait states for noe
;    Data1 (bits 11-9)  -     001          One Wait state for ASIC interface (0x8000-0xFFFF) 
;    Data2 (bits 8-6)   -        000       No Wait states for DATA memory range (0x0000 - 0x7FFF)
;    Prog1 (bits 5-3)   -           001    One Wait state for Instruction memory range (0x8000-0xFFFF)
;    Prog2 (bits 2-0)   -              000 No Wait states for Instruction memory range (0x0000-0x7FFF)
;                        -----------------
;                         0111001000001000 - 0x7208

SWWSR_INIT        .set        0x2208

; CLKMD:     See 8.4.2 of the CPU and Peripherals manual.
;            See Raman for chematic (CLKMD1,2,3 = 1,0,1 and desired clock frequency = 66 MHz)
;    PLLMUL (bit 15-12) - 0010             PLL multiplier = 2 (mult by 3)
;    PLLDIV (bit 11)    -     0            PLL divider = 0 (div by 1)
;    PLLCOUNT (bit 10-3)-      11111111    PLL counter set to max
;    PLLONOFF (bit 2)   -              1   PLL on
;    PLLNDIV (bit 1)    -               1  Select PLL mode
;    PLLSTATUS (bit 1)  -                x PLL Status (read only)
;                         ------------------
;                          0010011111111111 = 0x27ff
        
PLL_INIT_75MHZ        .set        0x27ff 
        
        
;-------------------------------------------------------------------------

;        .sect ".init_c54"
        .text

_INIT_C54:

;----------------------------------
; Disable and clear interrupts
;----------------------------------

	rsbx  INTM			   ;disable all interrupts
    stm   #0x107,	IMR    ; Mask INT0,INT1,INT2,INT3
    stm   #0x0,		IFR    ; Writing a 0 to an IFR bit,
                           ; clears the interrupt flag
        
;----------------------------------
; Initialize control registers
;----------------------------------
    stm   #PMST_INIT,  PMST

    ret         ;

.end