cpld

《CPLD开发实例》的配套光盘文件

LIBRARY IEEE;  
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY MEALY1 IS
PORT ( CLK ,DATAIN,RESET  : IN STD_LOGIC; 
         Q : OUT STD_LOGIC_VECTOR(4 DOWNTO 0));
END MEALY1;
ARCHITECTURE behav OF MEALY1 IS
  TYPE states IS (st0, st1, st2, st3,st4);      
  SIGNAL STX : states  ;  
BEGIN                          
 COMREG : PROCESS(CLK,RESET)  BEGIN --决定转换状态的进程
    IF RESET ='1' THEN
      STX <= ST0;
    ELSIF CLK'EVENT AND CLK = '1' THEN
    CASE STX IS           
        WHEN st0 => IF DATAIN = '1' THEN  STX <= st1; END IF;
        WHEN st1 => IF DATAIN = '0' THEN  STX <= st2; END IF;
        WHEN st2 => IF DATAIN = '1' THEN  STX <= st3; END IF;
        WHEN st3=>  IF DATAIN = '0' THEN  STX <= st4; END IF;
        WHEN st4=>  IF DATAIN = '1' THEN  STX <= st0; END IF;
        WHEN OTHERS => STX <= st0; 
     END CASE ;
   END IF;
 END PROCESS COMREG ;
COM1: PROCESS(STX,DATAIN) BEGIN --输出控制信号的进程
   CASE STX IS           
     WHEN st0 => IF DATAIN = '1' THEN Q <= "10000" ;
                  ELSE Q<="01010" ;
                  END IF ;
    WHEN st1 => IF DATAIN = '0' THEN Q <= "10111" ;
                  ELSE Q<="10100" ;
                  END IF ;                   
    WHEN st2 => IF DATAIN = '1' THEN Q <= "10101" ;
                  ELSE Q<="10011" ;
                  END IF ;
    WHEN st3=>  IF DATAIN = '0' THEN Q <= "11011" ;
                  ELSE Q<="01001" ;
                  END IF ;    
    WHEN st4=>  IF DATAIN = '1' THEN Q <= "11101" ;
                  ELSE Q<="01101" ;
                  END IF ;                                                
    WHEN OTHERS =>  Q<="00000" ;                
  END CASE ;
END PROCESS COM1 ;
END behav;