cpld

《CPLD开发实例》的配套光盘文件

library ieee;
use ieee.std_logic_1164.all;
entity or2a is
port (
a: in bit ;
b: in bit ;
c: out bit);
end or2a;
architecture rtl of or2a is
begin
c<= a or b after 10 ns;
end rtl;