📄 counter60.fit.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
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-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--B1_33 is 74390:inst|33 at LC_X4_Y4_N7
--operation mode is normal
B1_33_lut_out = !B1_33;
B1_33 = DFFEAS(B1_33_lut_out, B1_29, !GLOBAL(inst7), , , , , , );
--B1_32 is 74390:inst|32 at LC_X5_Y4_N2
--operation mode is normal
B1_32_lut_out = !B1_32;
B1_32 = DFFEAS(B1_32_lut_out, !B1_33, !GLOBAL(inst7), , , , , , );
--A1L5 is inst7~42 at LC_X4_Y4_N5
--operation mode is normal
B1_31_qfbk = B1_31;
A1L5 = B1_33 & B1_32 & !B1_31_qfbk;
--B1_31 is 74390:inst|31 at LC_X4_Y4_N5
--operation mode is normal
B1_31 = DFFEAS(A1L5, !B1_34, !GLOBAL(inst7), , , , , , );
--B1_5 is 74390:inst|5 at LC_X2_Y4_N2
--operation mode is normal
B1_5_lut_out = !B1_5;
B1_5 = DFFEAS(B1_5_lut_out, !B1_6, !GLOBAL(inst7), , , , , , );
--B1_6 is 74390:inst|6 at LC_X3_Y4_N9
--operation mode is normal
B1_6_lut_out = !B1_6;
B1_6 = DFFEAS(B1_6_lut_out, B1_20, !GLOBAL(inst7), , , , , , );
--B1_3 is 74390:inst|3 at LC_X3_Y4_N5
--operation mode is normal
B1_3_lut_out = B1_6 & B1_5 & (!B1_3);
B1_3 = DFFEAS(B1_3_lut_out, !B1_7, !GLOBAL(inst7), , , , , , );
--B1_7 is 74390:inst|7 at LC_X1_Y4_N2
--operation mode is normal
B1_7_lut_out = !B1_7;
B1_7 = DFFEAS(B1_7_lut_out, !clk, !GLOBAL(inst7), , , , , , );
--A1L6 is inst7~43 at LC_X4_Y4_N2
--operation mode is normal
A1L6 = !B1_7 & !B1_5 & !B1_3 & !B1_6;
--B1_34 is 74390:inst|34 at LC_X6_Y4_N2
--operation mode is normal
B1_34_lut_out = !B1_34;
B1_34 = DFFEAS(B1_34_lut_out, A1L3, !GLOBAL(inst7), , , , , , );
--inst7 is inst7 at LC_X4_Y4_N6
--operation mode is normal
inst7 = A1L6 & (!B1_34 & A1L5);
--B1_29 is 74390:inst|29 at LC_X4_Y4_N9
--operation mode is normal
B1_29 = B1_31 # !B1_34;
--B1_20 is 74390:inst|20 at LC_X4_Y4_N8
--operation mode is normal
B1_20 = B1_3 # !B1_7;
--A1L3 is inst2~19 at LC_X4_Y4_N4
--operation mode is normal
A1L3 = B1_5 # B1_6 # !B1_7 # !B1_3;
--clk is clk at PIN_27
--operation mode is input
clk = INPUT();
--cout is cout at PIN_40
--operation mode is output
cout = OUTPUT(inst7);
--q2[3] is q2[3] at PIN_39
--operation mode is output
q2[3] = OUTPUT(B1_31);
--q2[2] is q2[2] at PIN_31
--operation mode is output
q2[2] = OUTPUT(B1_32);
--q2[1] is q2[1] at PIN_41
--operation mode is output
q2[1] = OUTPUT(B1_33);
--q2[0] is q2[0] at PIN_42
--operation mode is output
q2[0] = OUTPUT(B1_34);
--q1[3] is q1[3] at PIN_38
--operation mode is output
q1[3] = OUTPUT(B1_3);
--q1[2] is q1[2] at PIN_32
--operation mode is output
q1[2] = OUTPUT(B1_5);
--q1[1] is q1[1] at PIN_26
--operation mode is output
q1[1] = OUTPUT(B1_6);
--q1[0] is q1[0] at PIN_28
--operation mode is output
q1[0] = OUTPUT(B1_7);
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