main.map.qmsg

一些很好的FPGA设计实例

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Jan 19 18:49:11 2008 " "Info: Processing started: Sat Jan 19 18:49:11 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off main -c main " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off main -c main" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "alarmclock.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file alarmclock.v" { { "Info" "ISGN_ENTITY_NAME" "1 alarmclock " "Info: Found entity 1: alarmclock" {  } { { "alarmclock.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/alarmclock.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "autodate.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file autodate.v" { { "Info" "ISGN_ENTITY_NAME" "1 autodate " "Info: Found entity 1: autodate" {  } { { "autodate.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/autodate.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Warning" "WVRFX_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "datecontrol.v(24) " "Warning (10268): Verilog HDL information at datecontrol.v(24): Always Construct contains both blocking and non-blocking assignments" {  } { { "datecontrol.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/datecontrol.v" 24 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: Always Construct contains both blocking and non-blocking assignments" 1 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "datecontrol.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file datecontrol.v" { { "Info" "ISGN_ENTITY_NAME" "1 datecontrol " "Info: Found entity 1: datecontrol" {  } { { "datecontrol.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/datecontrol.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "disp_data_mux.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file disp_data_mux.v" { { "Info" "ISGN_ENTITY_NAME" "1 disp_data_mux " "Info: Found entity 1: disp_data_mux" {  } { { "disp_data_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/disp_data_mux.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Warning" "WVRFX_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "fdiv.v(13) " "Warning (10268): Verilog HDL information at fdiv.v(13): Always Construct contains both blocking and non-blocking assignments" {  } { { "fdiv.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/fdiv.v" 13 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: Always Construct contains both blocking and non-blocking assignments" 1 0}
{ "Warning" "WVRFX_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "fdiv.v(27) " "Warning (10268): Verilog HDL information at fdiv.v(27): Always Construct contains both blocking and non-blocking assignments" {  } { { "fdiv.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/fdiv.v" 27 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: Always Construct contains both blocking and non-blocking assignments" 1 0}
{ "Warning" "WVRFX_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "fdiv.v(41) " "Warning (10268): Verilog HDL information at fdiv.v(41): Always Construct contains both blocking and non-blocking assignments" {  } { { "fdiv.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/fdiv.v" 41 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: Always Construct contains both blocking and non-blocking assignments" 1 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fdiv.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file fdiv.v" { { "Info" "ISGN_ENTITY_NAME" "1 fdiv " "Info: Found entity 1: fdiv" {  } { { "fdiv.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/fdiv.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hour_counter.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file hour_counter.v" { { "Info" "ISGN_ENTITY_NAME" "1 hour_counter " "Info: Found entity 1: hour_counter" {  } { { "hour_counter.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/hour_counter.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "maincontrol.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file maincontrol.v" { { "Info" "ISGN_ENTITY_NAME" "1 maincontrol " "Info: Found entity 1: maincontrol" {  } { { "maincontrol.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/maincontrol.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "minute_counter.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file minute_counter.v" { { "Info" "ISGN_ENTITY_NAME" "1 minute_counter " "Info: Found entity 1: minute_counter" {  } { { "minute_counter.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/minute_counter.v" 2 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "second_counter.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file second_counter.v" { { "Info" "ISGN_ENTITY_NAME" "1 second_counter " "Info: Found entity 1: second_counter" {  } { { "second_counter.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/second_counter.v" 2 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "setdate.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file setdate.v" { { "Info" "ISGN_ENTITY_NAME" "1 setdate " "Info: Found entity 1: setdate" {  } { { "setdate.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/setdate.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "stopwatch.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file stopwatch.v" { { "Info" "ISGN_ENTITY_NAME" "1 stopwatch " "Info: Found entity 1: stopwatch" {  } { { "stopwatch.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/stopwatch.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "time_auto_and_set.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file time_auto_and_set.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 time_auto_and_set " "Info: Found entity 1: time_auto_and_set" {  } { { "time_auto_and_set.bdf" "" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_auto_and_set.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "time_disp_select.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file time_disp_select.v" { { "Info" "ISGN_ENTITY_NAME" "1 time_disp_select " "Info: Found entity 1: time_disp_select" {  } { { "time_disp_select.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_disp_select.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "time_mux.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file time_mux.v" { { "Info" "ISGN_ENTITY_NAME" "1 time_mux " "Info: Found entity 1: time_mux" {  } { { "time_mux.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/time_mux.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "timepiece_main.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file timepiece_main.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 timepiece_main " "Info: Found entity 1: timepiece_main" {  } { { "timepiece_main.bdf" "" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/timepiece_main.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "timeset.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file timeset.v" { { "Info" "ISGN_ENTITY_NAME" "1 timeset " "Info: Found entity 1: timeset" {  } { { "timeset.v" "" { Text "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/timeset.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "main.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file main.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 main " "Info: Found entity 1: main" {  } { { "main.bdf" "" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/main.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "main " "Info: Elaborating entity \"main\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "alarmclock alarmclock:inst11 " "Info: Elaborating entity \"alarmclock\" for hierarchy \"alarmclock:inst11\"" {  } { { "main.bdf" "inst11" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/main.bdf" { { -56 912 1176 168 "inst11" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "maincontrol maincontrol:inst3 " "Info: Elaborating entity \"maincontrol\" for hierarchy \"maincontrol:inst3\"" {  } { { "main.bdf" "inst3" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/main.bdf" { { 208 160 312 368 "inst3" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "fdiv fdiv:inst5 " "Info: Elaborating entity \"fdiv\" for hierarchy \"fdiv:inst5\"" {  } { { "main.bdf" "inst5" { Schematic "C:/Documents and Settings/zhang/桌面/多功能数字钟/main/main.bdf" { { 72 160 256 168 "inst5" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}