main.tan.rpt

一些很好的FPGA设计实例

; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set0[0] ; time_auto_and_set:inst1|timeset:inst2|second_set0[1] ; SW2        ; SW2      ; None                        ; None                      ; 0.734 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set0[0] ; time_auto_and_set:inst1|timeset:inst2|second_set0[3] ; SW2        ; SW2      ; None                        ; None                      ; 0.733 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set0[0] ; time_auto_and_set:inst1|timeset:inst2|second_set0[0] ; SW2        ; SW2      ; None                        ; None                      ; 0.731 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set1[0] ; time_auto_and_set:inst1|timeset:inst2|second_set1[2] ; SW2        ; SW2      ; None                        ; None                      ; 0.723 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set1[0] ; time_auto_and_set:inst1|timeset:inst2|second_set1[1] ; SW2        ; SW2      ; None                        ; None                      ; 0.722 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set1[0] ; time_auto_and_set:inst1|timeset:inst2|second_set1[0] ; SW2        ; SW2      ; None                        ; None                      ; 0.720 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set0[1]   ; time_auto_and_set:inst1|timeset:inst2|hour_set0[0]   ; SW2        ; SW2      ; None                        ; None                      ; 0.703 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set0[1]   ; time_auto_and_set:inst1|timeset:inst2|hour_set0[1]   ; SW2        ; SW2      ; None                        ; None                      ; 0.700 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set0[1]   ; time_auto_and_set:inst1|timeset:inst2|hour_set0[3]   ; SW2        ; SW2      ; None                        ; None                      ; 0.700 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set1[0]                     ; alarmclock:inst11|minute_set1[2]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.700 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set1[0]                     ; alarmclock:inst11|minute_set1[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.700 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set0[1]   ; time_auto_and_set:inst1|timeset:inst2|hour_set0[2]   ; SW2        ; SW2      ; None                        ; None                      ; 0.700 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set1[0]                     ; alarmclock:inst11|minute_set1[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.698 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|hour_set1[1]                       ; alarmclock:inst11|hour_set1[0]                       ; SW2        ; SW2      ; None                        ; None                      ; 0.686 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|hour_set1[1]                       ; alarmclock:inst11|hour_set1[1]                       ; SW2        ; SW2      ; None                        ; None                      ; 0.682 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set1[0] ; time_auto_and_set:inst1|timeset:inst2|minute_set1[2] ; SW2        ; SW2      ; None                        ; None                      ; 0.680 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set1[0] ; time_auto_and_set:inst1|timeset:inst2|minute_set1[0] ; SW2        ; SW2      ; None                        ; None                      ; 0.680 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set1[0] ; time_auto_and_set:inst1|timeset:inst2|minute_set1[1] ; SW2        ; SW2      ; None                        ; None                      ; 0.680 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[1] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[0] ; SW2        ; SW2      ; None                        ; None                      ; 0.676 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[1]            ; date_main:inst4|setdate:inst2|day_set0[3]            ; SW2        ; SW2      ; None                        ; None                      ; 0.676 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[1]          ; date_main:inst4|setdate:inst2|month_set0[3]          ; SW2        ; SW2      ; None                        ; None                      ; 0.676 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[1] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[2] ; SW2        ; SW2      ; None                        ; None                      ; 0.675 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[1]          ; date_main:inst4|setdate:inst2|month_set0[0]          ; SW2        ; SW2      ; None                        ; None                      ; 0.675 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[1]            ; date_main:inst4|setdate:inst2|day_set0[0]            ; SW2        ; SW2      ; None                        ; None                      ; 0.675 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|hour_set0[0]                       ; alarmclock:inst11|hour_set0[0]                       ; SW2        ; SW2      ; None                        ; None                      ; 0.673 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[1] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[3] ; SW2        ; SW2      ; None                        ; None                      ; 0.671 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[1]            ; date_main:inst4|setdate:inst2|day_set0[2]            ; SW2        ; SW2      ; None                        ; None                      ; 0.671 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[1]          ; date_main:inst4|setdate:inst2|month_set0[2]          ; SW2        ; SW2      ; None                        ; None                      ; 0.671 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[1] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[1] ; SW2        ; SW2      ; None                        ; None                      ; 0.669 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[1]          ; date_main:inst4|setdate:inst2|month_set0[1]          ; SW2        ; SW2      ; None                        ; None                      ; 0.669 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[1]            ; date_main:inst4|setdate:inst2|day_set0[1]            ; SW2        ; SW2      ; None                        ; None                      ; 0.669 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[0]                     ; alarmclock:inst11|minute_set0[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.667 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[0]                     ; alarmclock:inst11|second_set1[2]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.666 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[0]                     ; alarmclock:inst11|second_set1[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.662 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[0]                     ; alarmclock:inst11|second_set1[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.661 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[2]                     ; alarmclock:inst11|minute_set0[3]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.660 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[2]                     ; alarmclock:inst11|minute_set0[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.657 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[2]                     ; alarmclock:inst11|minute_set0[2]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.656 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set0[1]                     ; alarmclock:inst11|second_set0[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.648 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set1[0]   ; time_auto_and_set:inst1|timeset:inst2|hour_set1[0]   ; SW2        ; SW2      ; None                        ; None                      ; 0.645 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set1[0]          ; date_main:inst4|setdate:inst2|month_set1[0]          ; SW2        ; SW2      ; None                        ; None                      ; 0.645 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set1[0]            ; date_main:inst4|setdate:inst2|day_set1[0]            ; SW2        ; SW2      ; None                        ; None                      ; 0.645 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set1[0]   ; time_auto_and_set:inst1|timeset:inst2|hour_set1[1]   ; SW2        ; SW2      ; None                        ; None                      ; 0.644 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set1[0]          ; date_main:inst4|setdate:inst2|month_set1[1]          ; SW2        ; SW2      ; None                        ; None                      ; 0.644 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set1[0]            ; date_main:inst4|setdate:inst2|day_set1[1]            ; SW2        ; SW2      ; None                        ; None                      ; 0.644 ns                ;
+-------+------------------------------------------------+------------------------------------------------------+------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'Clock'                                                                                                                                                                                                                                                                                   ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------+--------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                    ; To                                               ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------+--------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 69.93 MHz ( period = 14.301 ns )                    ; date_main:inst4|autodate:inst|EO1       ; date_main:inst4|datecontrol:inst1|disp_select[5] ; Clock      ; Clock    ; None                        ; None                      ; 2.218 ns                ;
; N/A                                     ; 71.67 MHz ( period = 13.953 ns )                    ; date_main:inst4|autodate:inst|EO1       ; date_main:inst4|datecontrol:inst1|month1[1]      ; Clock      ; Clock    ; None                        ; None                      ; 1.827 ns                ;
; N/A                                     ; 71.67 MHz ( period = 13.953 ns )                    ; date_main:inst4|autodate:inst|EO1       ; date_main:inst4|datecontrol:inst1|day0[1]        ; Clock      ; Clock    ; None                        ; None                      ; 1.827 ns                ;
; N/A                                     ; 71.67 MHz ( period = 13.953 ns )                    ; date_main:inst4|autodate:inst|EO1       ; date_main:inst4|datecontrol:inst1|day1[1]        ; Clock      ; Clock    ; None                        ; None                      ; 1.827 ns                ;
; N/A                                     ; 71.67 MHz ( period = 13.953 ns )                    ; date_main:inst4|autodate:inst|EO1       ; date_main:inst4|datecontrol:inst1|day0[2]        ; Clock      ; Clock    ; None                        ; None                      ; 1.827 ns                ;
; N/A                                     ; 71.67 MHz ( period = 13.953 ns )