main.tan.rpt

来自「一些很好的FPGA设计实例」· RPT 代码 · 共 299 行 · 第 1/5 页

; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[1]                     ; alarmclock:inst11|minute_set0[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.879 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[0]                     ; alarmclock:inst11|minute_set0[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.878 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[3] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[1] ; SW2        ; SW2      ; None                        ; None                      ; 0.878 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[3] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[3] ; SW2        ; SW2      ; None                        ; None                      ; 0.877 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[2]            ; date_main:inst4|setdate:inst2|day_set0[3]            ; SW2        ; SW2      ; None                        ; None                      ; 0.874 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[2]          ; date_main:inst4|setdate:inst2|month_set0[3]          ; SW2        ; SW2      ; None                        ; None                      ; 0.874 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[1]                     ; alarmclock:inst11|second_set1[2]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.873 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[2]          ; date_main:inst4|setdate:inst2|month_set0[0]          ; SW2        ; SW2      ; None                        ; None                      ; 0.873 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[2]            ; date_main:inst4|setdate:inst2|day_set0[0]            ; SW2        ; SW2      ; None                        ; None                      ; 0.873 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[1]                     ; alarmclock:inst11|second_set1[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.870 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[1]                     ; alarmclock:inst11|second_set1[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.869 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set0[1]                     ; alarmclock:inst11|second_set0[3]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.868 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[2]            ; date_main:inst4|setdate:inst2|day_set0[2]            ; SW2        ; SW2      ; None                        ; None                      ; 0.868 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[2]          ; date_main:inst4|setdate:inst2|month_set0[2]          ; SW2        ; SW2      ; None                        ; None                      ; 0.868 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set0[3]                     ; alarmclock:inst11|second_set0[2]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.862 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set0[3]                     ; alarmclock:inst11|second_set0[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.862 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set0[3]                     ; alarmclock:inst11|second_set0[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.861 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[2]                     ; alarmclock:inst11|second_set1[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.812 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[1]                     ; alarmclock:inst11|minute_set0[2]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.812 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[1]                     ; alarmclock:inst11|minute_set0[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.812 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[0] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[1] ; SW2        ; SW2      ; None                        ; None                      ; 0.812 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[3]          ; date_main:inst4|setdate:inst2|month_set0[1]          ; SW2        ; SW2      ; None                        ; None                      ; 0.812 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[3]            ; date_main:inst4|setdate:inst2|day_set0[1]            ; SW2        ; SW2      ; None                        ; None                      ; 0.812 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[0]            ; date_main:inst4|setdate:inst2|day_set0[2]            ; SW2        ; SW2      ; None                        ; None                      ; 0.812 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[0]          ; date_main:inst4|setdate:inst2|month_set0[2]          ; SW2        ; SW2      ; None                        ; None                      ; 0.812 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[2]                     ; alarmclock:inst11|second_set1[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.811 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set1[2] ; time_auto_and_set:inst1|timeset:inst2|second_set1[0] ; SW2        ; SW2      ; None                        ; None                      ; 0.811 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|hour_set1[0]                       ; alarmclock:inst11|hour_set1[0]                       ; SW2        ; SW2      ; None                        ; None                      ; 0.810 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set1[2] ; time_auto_and_set:inst1|timeset:inst2|minute_set1[0] ; SW2        ; SW2      ; None                        ; None                      ; 0.810 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set1[2] ; time_auto_and_set:inst1|timeset:inst2|minute_set1[1] ; SW2        ; SW2      ; None                        ; None                      ; 0.810 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[0]          ; date_main:inst4|setdate:inst2|month_set0[0]          ; SW2        ; SW2      ; None                        ; None                      ; 0.810 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[0]            ; date_main:inst4|setdate:inst2|day_set0[0]            ; SW2        ; SW2      ; None                        ; None                      ; 0.810 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set1[2] ; time_auto_and_set:inst1|timeset:inst2|second_set1[1] ; SW2        ; SW2      ; None                        ; None                      ; 0.809 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[3]                     ; alarmclock:inst11|minute_set0[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.809 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set0[1]                     ; alarmclock:inst11|minute_set0[3]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.809 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set0[0]            ; date_main:inst4|setdate:inst2|day_set0[3]            ; SW2        ; SW2      ; None                        ; None                      ; 0.809 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set0[0]          ; date_main:inst4|setdate:inst2|month_set0[3]          ; SW2        ; SW2      ; None                        ; None                      ; 0.809 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|hour_set1[0]                       ; alarmclock:inst11|hour_set1[1]                       ; SW2        ; SW2      ; None                        ; None                      ; 0.808 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set1[2] ; time_auto_and_set:inst1|timeset:inst2|minute_set1[2] ; SW2        ; SW2      ; None                        ; None                      ; 0.808 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set1[2] ; time_auto_and_set:inst1|timeset:inst2|second_set1[2] ; SW2        ; SW2      ; None                        ; None                      ; 0.807 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set1[2]                     ; alarmclock:inst11|second_set1[2]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.806 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set1[2]                     ; alarmclock:inst11|minute_set1[1]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.806 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set1[2]                     ; alarmclock:inst11|minute_set1[2]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.804 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|minute_set1[2]                     ; alarmclock:inst11|minute_set1[0]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.804 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set0[2] ; time_auto_and_set:inst1|timeset:inst2|second_set0[3] ; SW2        ; SW2      ; None                        ; None                      ; 0.802 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[2] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[3] ; SW2        ; SW2      ; None                        ; None                      ; 0.802 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set0[2] ; time_auto_and_set:inst1|timeset:inst2|second_set0[0] ; SW2        ; SW2      ; None                        ; None                      ; 0.801 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set0[2]   ; time_auto_and_set:inst1|timeset:inst2|hour_set0[0]   ; SW2        ; SW2      ; None                        ; None                      ; 0.800 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set0[2] ; time_auto_and_set:inst1|timeset:inst2|second_set0[2] ; SW2        ; SW2      ; None                        ; None                      ; 0.800 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[2] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[0] ; SW2        ; SW2      ; None                        ; None                      ; 0.800 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|minute_set0[2] ; time_auto_and_set:inst1|timeset:inst2|minute_set0[2] ; SW2        ; SW2      ; None                        ; None                      ; 0.800 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set0[2]   ; time_auto_and_set:inst1|timeset:inst2|hour_set0[2]   ; SW2        ; SW2      ; None                        ; None                      ; 0.800 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set1[1]          ; date_main:inst4|setdate:inst2|month_set1[0]          ; SW2        ; SW2      ; None                        ; None                      ; 0.800 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set0[2]   ; time_auto_and_set:inst1|timeset:inst2|hour_set0[3]   ; SW2        ; SW2      ; None                        ; None                      ; 0.799 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|month_set1[1]          ; date_main:inst4|setdate:inst2|month_set1[1]          ; SW2        ; SW2      ; None                        ; None                      ; 0.799 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; alarmclock:inst11|second_set0[3]                     ; alarmclock:inst11|second_set0[3]                     ; SW2        ; SW2      ; None                        ; None                      ; 0.792 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set1[1]   ; time_auto_and_set:inst1|timeset:inst2|hour_set1[0]   ; SW2        ; SW2      ; None                        ; None                      ; 0.791 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|hour_set1[1]   ; time_auto_and_set:inst1|timeset:inst2|hour_set1[1]   ; SW2        ; SW2      ; None                        ; None                      ; 0.790 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; date_main:inst4|setdate:inst2|day_set1[1]            ; date_main:inst4|setdate:inst2|day_set1[1]            ; SW2        ; SW2      ; None                        ; None                      ; 0.780 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; time_auto_and_set:inst1|timeset:inst2|second_set0[0] ; time_auto_and_set:inst1|timeset:inst2|second_set0[2] ; SW2        ; SW2      ; None                        ; None                      ; 0.735 ns                ;