top.sim.rpt

来自「一些很好的FPGA设计实例」· RPT 代码 · 共 265 行 · 第 1/2 页

RPT
265
字号
; |TOP|data[9]                  ; |TOP|data[9]                  ; padio            ;
; |TOP|f[11]                    ; |TOP|f[11]                    ; padio            ;
; |TOP|inst11~62                ; |TOP|inst11~62                ; dataout          ;
; |TOP|inst11~63                ; |TOP|inst11~63                ; dataout          ;
+-------------------------------+-------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                           ;
+--------------------------------+--------------------------------+------------------+
; Node Name                      ; Output Port Name               ; Output Port Type ;
+--------------------------------+--------------------------------+------------------+
; |TOP|dcount:inst7|dcounter[0]  ; |TOP|dcount:inst7|dcounter[0]  ; dataout          ;
; |TOP|fcount:inst|fcounter[0]   ; |TOP|fcount:inst|fcounter[0]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[3]  ; |TOP|dcount:inst7|dcounter[3]  ; dataout          ;
; |TOP|fcount:inst|fcounter[3]   ; |TOP|fcount:inst|fcounter[3]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[4]  ; |TOP|dcount:inst7|dcounter[4]  ; dataout          ;
; |TOP|fcount:inst|fcounter[4]   ; |TOP|fcount:inst|fcounter[4]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[5]  ; |TOP|dcount:inst7|dcounter[5]  ; dataout          ;
; |TOP|fcount:inst|fcounter[5]   ; |TOP|fcount:inst|fcounter[5]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[6]  ; |TOP|dcount:inst7|dcounter[6]  ; dataout          ;
; |TOP|fcount:inst|fcounter[6]   ; |TOP|fcount:inst|fcounter[6]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[7]  ; |TOP|dcount:inst7|dcounter[7]  ; dataout          ;
; |TOP|fcount:inst|fcounter[7]   ; |TOP|fcount:inst|fcounter[7]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[8]  ; |TOP|dcount:inst7|dcounter[8]  ; dataout          ;
; |TOP|fcount:inst|fcounter[8]   ; |TOP|fcount:inst|fcounter[8]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[11] ; |TOP|dcount:inst7|dcounter[11] ; dataout          ;
; |TOP|dcount:inst7|dcounter[12] ; |TOP|dcount:inst7|dcounter[12] ; dataout          ;
; |TOP|fcount:inst|fcounter[12]  ; |TOP|fcount:inst|fcounter[12]  ; dataout          ;
; |TOP|data[0]                   ; |TOP|data[0]                   ; padio            ;
; |TOP|f[0]                      ; |TOP|f[0]                      ; padio            ;
; |TOP|data[3]                   ; |TOP|data[3]                   ; padio            ;
; |TOP|f[3]                      ; |TOP|f[3]                      ; padio            ;
; |TOP|data[4]                   ; |TOP|data[4]                   ; padio            ;
; |TOP|f[4]                      ; |TOP|f[4]                      ; padio            ;
; |TOP|data[5]                   ; |TOP|data[5]                   ; padio            ;
; |TOP|f[5]                      ; |TOP|f[5]                      ; padio            ;
; |TOP|data[6]                   ; |TOP|data[6]                   ; padio            ;
; |TOP|f[6]                      ; |TOP|f[6]                      ; padio            ;
; |TOP|data[7]                   ; |TOP|data[7]                   ; padio            ;
; |TOP|f[7]                      ; |TOP|f[7]                      ; padio            ;
; |TOP|data[8]                   ; |TOP|data[8]                   ; padio            ;
; |TOP|f[8]                      ; |TOP|f[8]                      ; padio            ;
; |TOP|data[11]                  ; |TOP|data[11]                  ; padio            ;
; |TOP|data[12]                  ; |TOP|data[12]                  ; padio            ;
; |TOP|f[12]                     ; |TOP|f[12]                     ; padio            ;
+--------------------------------+--------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                           ;
+--------------------------------+--------------------------------+------------------+
; Node Name                      ; Output Port Name               ; Output Port Type ;
+--------------------------------+--------------------------------+------------------+
; |TOP|pre_lag:inst2|pre         ; |TOP|pre_lag:inst2|pre         ; dataout          ;
; |TOP|dcount:inst7|dcounter[0]  ; |TOP|dcount:inst7|dcounter[0]  ; dataout          ;
; |TOP|fcount:inst|fcounter[0]   ; |TOP|fcount:inst|fcounter[0]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[1]  ; |TOP|dcount:inst7|dcounter[1]  ; dataout          ;
; |TOP|fcount:inst|fcounter[2]   ; |TOP|fcount:inst|fcounter[2]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[3]  ; |TOP|dcount:inst7|dcounter[3]  ; dataout          ;
; |TOP|fcount:inst|fcounter[3]   ; |TOP|fcount:inst|fcounter[3]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[4]  ; |TOP|dcount:inst7|dcounter[4]  ; dataout          ;
; |TOP|fcount:inst|fcounter[4]   ; |TOP|fcount:inst|fcounter[4]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[5]  ; |TOP|dcount:inst7|dcounter[5]  ; dataout          ;
; |TOP|fcount:inst|fcounter[5]   ; |TOP|fcount:inst|fcounter[5]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[6]  ; |TOP|dcount:inst7|dcounter[6]  ; dataout          ;
; |TOP|fcount:inst|fcounter[6]   ; |TOP|fcount:inst|fcounter[6]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[7]  ; |TOP|dcount:inst7|dcounter[7]  ; dataout          ;
; |TOP|fcount:inst|fcounter[7]   ; |TOP|fcount:inst|fcounter[7]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[8]  ; |TOP|dcount:inst7|dcounter[8]  ; dataout          ;
; |TOP|fcount:inst|fcounter[8]   ; |TOP|fcount:inst|fcounter[8]   ; dataout          ;
; |TOP|fcount:inst|fcounter[9]   ; |TOP|fcount:inst|fcounter[9]   ; dataout          ;
; |TOP|dcount:inst7|dcounter[10] ; |TOP|dcount:inst7|dcounter[10] ; dataout          ;
; |TOP|fcount:inst|fcounter[10]  ; |TOP|fcount:inst|fcounter[10]  ; dataout          ;
; |TOP|dcount:inst7|dcounter[11] ; |TOP|dcount:inst7|dcounter[11] ; dataout          ;
; |TOP|dcount:inst7|dcounter[12] ; |TOP|dcount:inst7|dcounter[12] ; dataout          ;
; |TOP|fcount:inst|fcounter[12]  ; |TOP|fcount:inst|fcounter[12]  ; dataout          ;
; |TOP|pre_lag                   ; |TOP|pre_lag                   ; padio            ;
; |TOP|data[0]                   ; |TOP|data[0]                   ; padio            ;
; |TOP|f[0]                      ; |TOP|f[0]                      ; padio            ;
; |TOP|data[1]                   ; |TOP|data[1]                   ; padio            ;
; |TOP|f[2]                      ; |TOP|f[2]                      ; padio            ;
; |TOP|data[3]                   ; |TOP|data[3]                   ; padio            ;
; |TOP|f[3]                      ; |TOP|f[3]                      ; padio            ;
; |TOP|data[4]                   ; |TOP|data[4]                   ; padio            ;
; |TOP|f[4]                      ; |TOP|f[4]                      ; padio            ;
; |TOP|data[5]                   ; |TOP|data[5]                   ; padio            ;
; |TOP|f[5]                      ; |TOP|f[5]                      ; padio            ;
; |TOP|data[6]                   ; |TOP|data[6]                   ; padio            ;
; |TOP|f[6]                      ; |TOP|f[6]                      ; padio            ;
; |TOP|data[7]                   ; |TOP|data[7]                   ; padio            ;
; |TOP|f[7]                      ; |TOP|f[7]                      ; padio            ;
; |TOP|data[8]                   ; |TOP|data[8]                   ; padio            ;
; |TOP|f[8]                      ; |TOP|f[8]                      ; padio            ;
; |TOP|f[9]                      ; |TOP|f[9]                      ; padio            ;
; |TOP|data[10]                  ; |TOP|data[10]                  ; padio            ;
; |TOP|f[10]                     ; |TOP|f[10]                     ; padio            ;
; |TOP|data[11]                  ; |TOP|data[11]                  ; padio            ;
; |TOP|data[12]                  ; |TOP|data[12]                  ; padio            ;
; |TOP|f[12]                     ; |TOP|f[12]                     ; padio            ;
+--------------------------------+--------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Sat Jan 12 17:40:58 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off TOP -c TOP
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      36.99 %
Info: Number of transitions in simulation is 4236843
Info: Vector file TOP.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Processing ended: Sat Jan 12 17:49:31 2008
    Info: Elapsed time: 00:08:33


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