main.hier_info

一些很好的FPGA设计实例

counter_data[1] => Equal4.IN3
counter_data[1] => Equal5.IN4
counter_data[1] => Equal6.IN5
counter_data[1] => Equal7.IN6
counter_data[1] => Equal8.IN7
counter_data[1] => Equal9.IN8
counter_data[1] => Equal10.IN9
counter_data[1] => Equal11.IN10
counter_data[1] => Equal12.IN11
counter_data[1] => Equal13.IN12
counter_data[1] => Equal14.IN13
counter_data[2] => Equal1.IN2
counter_data[2] => Equal2.IN0
counter_data[2] => Equal3.IN1
counter_data[2] => Equal4.IN2
counter_data[2] => Equal5.IN3
counter_data[2] => Equal6.IN4
counter_data[2] => Equal7.IN5
counter_data[2] => Equal8.IN6
counter_data[2] => Equal9.IN7
counter_data[2] => Equal10.IN8
counter_data[2] => Equal11.IN9
counter_data[2] => Equal12.IN10
counter_data[2] => Equal13.IN11
counter_data[2] => Equal14.IN12
counter_data[3] => Equal2.IN3
counter_data[3] => Equal3.IN0
counter_data[3] => Equal4.IN1
counter_data[3] => Equal5.IN2
counter_data[3] => Equal6.IN3
counter_data[3] => Equal7.IN4
counter_data[3] => Equal8.IN5
counter_data[3] => Equal9.IN6
counter_data[3] => Equal10.IN7
counter_data[3] => Equal11.IN8
counter_data[3] => Equal12.IN9
counter_data[3] => Equal13.IN10
counter_data[3] => Equal14.IN11
counter_data[4] => Equal3.IN4
counter_data[4] => Equal4.IN0
counter_data[4] => Equal5.IN1
counter_data[4] => Equal6.IN2
counter_data[4] => Equal7.IN3
counter_data[4] => Equal8.IN4
counter_data[4] => Equal9.IN5
counter_data[4] => Equal10.IN6
counter_data[4] => Equal11.IN7
counter_data[4] => Equal12.IN8
counter_data[4] => Equal13.IN9
counter_data[4] => Equal14.IN10
counter_data[5] => Equal4.IN5
counter_data[5] => Equal5.IN0
counter_data[5] => Equal6.IN1
counter_data[5] => Equal7.IN2
counter_data[5] => Equal8.IN3
counter_data[5] => Equal9.IN4
counter_data[5] => Equal10.IN5
counter_data[5] => Equal11.IN6
counter_data[5] => Equal12.IN7
counter_data[5] => Equal13.IN8
counter_data[5] => Equal14.IN9
counter_data[6] => Equal5.IN6
counter_data[6] => Equal6.IN0
counter_data[6] => Equal7.IN1
counter_data[6] => Equal8.IN2
counter_data[6] => Equal9.IN3
counter_data[6] => Equal10.IN4
counter_data[6] => Equal11.IN5
counter_data[6] => Equal12.IN6
counter_data[6] => Equal13.IN7
counter_data[6] => Equal14.IN8
counter_data[7] => Equal6.IN7
counter_data[7] => Equal7.IN0
counter_data[7] => Equal8.IN1
counter_data[7] => Equal9.IN2
counter_data[7] => Equal10.IN3
counter_data[7] => Equal11.IN4
counter_data[7] => Equal12.IN5
counter_data[7] => Equal13.IN6
counter_data[7] => Equal14.IN7
counter_data[8] => Equal7.IN8
counter_data[8] => Equal8.IN0
counter_data[8] => Equal9.IN1
counter_data[8] => Equal10.IN2
counter_data[8] => Equal11.IN3
counter_data[8] => Equal12.IN4
counter_data[8] => Equal13.IN5
counter_data[8] => Equal14.IN6
counter_data[9] => Equal8.IN9
counter_data[9] => Equal9.IN0
counter_data[9] => Equal10.IN1
counter_data[9] => Equal11.IN2
counter_data[9] => Equal12.IN3
counter_data[9] => Equal13.IN4
counter_data[9] => Equal14.IN5
counter_data[10] => Equal9.IN10
counter_data[10] => Equal10.IN0
counter_data[10] => Equal11.IN1
counter_data[10] => Equal12.IN2
counter_data[10] => Equal13.IN3
counter_data[10] => Equal14.IN4
counter_data[11] => Equal10.IN11
counter_data[11] => Equal11.IN0
counter_data[11] => Equal12.IN1
counter_data[11] => Equal13.IN2
counter_data[11] => Equal14.IN3
counter_data[12] => Equal11.IN12
counter_data[12] => Equal12.IN0
counter_data[12] => Equal13.IN1
counter_data[12] => Equal14.IN2
counter_data[13] => Equal12.IN13
counter_data[13] => Equal13.IN0
counter_data[13] => Equal14.IN1
counter_data[14] => Equal13.IN14
counter_data[14] => Equal14.IN0
counter_data[15] => Equal14.IN15
pulse_16_out[0] <= pulse_16_out~15.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[1] <= pulse_16_out~14.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[2] <= pulse_16_out~13.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[3] <= pulse_16_out~12.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[4] <= pulse_16_out~11.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[5] <= pulse_16_out~10.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[6] <= pulse_16_out~9.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[7] <= pulse_16_out~8.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[8] <= pulse_16_out~7.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[9] <= pulse_16_out~6.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[10] <= pulse_16_out~5.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[11] <= pulse_16_out~4.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[12] <= pulse_16_out~3.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[13] <= pulse_16_out~2.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[14] <= pulse_16_out~1.DB_MAX_OUTPUT_PORT_TYPE
pulse_16_out[15] <= pulse_16_out~0.DB_MAX_OUTPUT_PORT_TYPE


|main|counter_16_bits:inst1
Clk_65536Hz => counter_out[14]~reg0.CLK
Clk_65536Hz => counter_out[13]~reg0.CLK
Clk_65536Hz => counter_out[12]~reg0.CLK
Clk_65536Hz => counter_out[11]~reg0.CLK
Clk_65536Hz => counter_out[10]~reg0.CLK
Clk_65536Hz => counter_out[9]~reg0.CLK
Clk_65536Hz => counter_out[8]~reg0.CLK
Clk_65536Hz => counter_out[7]~reg0.CLK
Clk_65536Hz => counter_out[6]~reg0.CLK
Clk_65536Hz => counter_out[5]~reg0.CLK
Clk_65536Hz => counter_out[4]~reg0.CLK
Clk_65536Hz => counter_out[3]~reg0.CLK
Clk_65536Hz => counter_out[2]~reg0.CLK
Clk_65536Hz => counter_out[1]~reg0.CLK
Clk_65536Hz => counter_out[0]~reg0.CLK
Clk_65536Hz => counter_out[15]~reg0.CLK
Reset => ~NO_FANOUT~
counter_out[0] <= counter_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[1] <= counter_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[2] <= counter_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[3] <= counter_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[4] <= counter_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[5] <= counter_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[6] <= counter_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[7] <= counter_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[8] <= counter_out[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[9] <= counter_out[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[10] <= counter_out[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[11] <= counter_out[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[12] <= counter_out[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[13] <= counter_out[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[14] <= counter_out[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counter_out[15] <= counter_out[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|main|second_pulse_latch:inst3
Reset => second_pulse_out~64.OUTPUTSELECT
Reset => second_pulse_out~65.OUTPUTSELECT
Reset => second_pulse_out~66.OUTPUTSELECT
Reset => second_pulse_out~67.OUTPUTSELECT
Reset => second_pulse_out~68.OUTPUTSELECT
Reset => second_pulse_out~69.OUTPUTSELECT
Reset => second_pulse_out~70.OUTPUTSELECT
Reset => second_pulse_out~71.OUTPUTSELECT
Reset => second_pulse_out~72.OUTPUTSELECT
Reset => second_pulse_out~73.OUTPUTSELECT
Reset => second_pulse_out~74.OUTPUTSELECT
Reset => second_pulse_out~75.OUTPUTSELECT
Reset => second_pulse_out~76.OUTPUTSELECT
Reset => second_pulse_out~77.OUTPUTSELECT
Reset => second_pulse_out~78.OUTPUTSELECT
Reset => second_pulse_out~79.OUTPUTSELECT
Clk_1Hz => second_pulse_out[14]~reg0.CLK
Clk_1Hz => second_pulse_out[13]~reg0.CLK
Clk_1Hz => second_pulse_out[12]~reg0.CLK
Clk_1Hz => second_pulse_out[11]~reg0.CLK
Clk_1Hz => second_pulse_out[10]~reg0.CLK
Clk_1Hz => second_pulse_out[9]~reg0.CLK
Clk_1Hz => second_pulse_out[8]~reg0.CLK
Clk_1Hz => second_pulse_out[7]~reg0.CLK
Clk_1Hz => second_pulse_out[6]~reg0.CLK
Clk_1Hz => second_pulse_out[5]~reg0.CLK
Clk_1Hz => second_pulse_out[4]~reg0.CLK
Clk_1Hz => second_pulse_out[3]~reg0.CLK
Clk_1Hz => second_pulse_out[2]~reg0.CLK
Clk_1Hz => second_pulse_out[1]~reg0.CLK
Clk_1Hz => second_pulse_out[0]~reg0.CLK
Clk_1Hz => second_pulse_out[15]~reg0.CLK
speed[0] => ~NO_FANOUT~
speed[1] => ~NO_FANOUT~
speed[2] => ~NO_FANOUT~
speed[3] => ~NO_FANOUT~
speed[4] => ~NO_FANOUT~
speed[5] => ~NO_FANOUT~
speed[6] => ~NO_FANOUT~
speed[7] => ~NO_FANOUT~
speed[8] => ~NO_FANOUT~
speed[9] => ~NO_FANOUT~
speed[10] => ~NO_FANOUT~
speed[11] => ~NO_FANOUT~
speed[12] => ~NO_FANOUT~
speed[13] => ~NO_FANOUT~
speed[14] => ~NO_FANOUT~
speed[15] => ~NO_FANOUT~
acceleration[0] => Add0.IN32
acceleration[0] => Add1.IN16
acceleration[1] => Add0.IN31
acceleration[1] => Add1.IN15
acceleration[2] => Add0.IN30
acceleration[2] => Add1.IN14
acceleration[3] => Add0.IN29
acceleration[3] => Add1.IN13
acceleration[4] => Add0.IN28
acceleration[4] => Add1.IN12
acceleration[5] => Add0.IN27
acceleration[5] => Add1.IN11
acceleration[6] => Add0.IN26
acceleration[6] => Add1.IN10
acceleration[7] => Add0.IN25
acceleration[7] => Add1.IN9
acceleration[8] => Add0.IN24
acceleration[8] => Add1.IN8
acceleration[9] => Add0.IN23
acceleration[9] => Add1.IN7
acceleration[10] => Add0.IN22
acceleration[10] => Add1.IN6
acceleration[11] => Add0.IN21
acceleration[11] => Add1.IN5
acceleration[12] => Add0.IN20
acceleration[12] => Add1.IN4
acceleration[13] => Add0.IN19
acceleration[13] => Add1.IN3
acceleration[14] => Add0.IN18
acceleration[14] => Add1.IN2
acceleration[15] => Add0.IN17
acceleration[15] => Add1.IN1
acceleration[16] => second_pulse_out~32.OUTPUTSELECT
acceleration[16] => second_pulse_out~33.OUTPUTSELECT
acceleration[16] => second_pulse_out~34.OUTPUTSELECT
acceleration[16] => second_pulse_out~35.OUTPUTSELECT
acceleration[16] => second_pulse_out~36.OUTPUTSELECT
acceleration[16] => second_pulse_out~37.OUTPUTSELECT
acceleration[16] => second_pulse_out~38.OUTPUTSELECT
acceleration[16] => second_pulse_out~39.OUTPUTSELECT
acceleration[16] => second_pulse_out~40.OUTPUTSELECT
acceleration[16] => second_pulse_out~41.OUTPUTSELECT
acceleration[16] => second_pulse_out~42.OUTPUTSELECT
acceleration[16] => second_pulse_out~43.OUTPUTSELECT
acceleration[16] => second_pulse_out~44.OUTPUTSELECT
acceleration[16] => second_pulse_out~45.OUTPUTSELECT
acceleration[16] => second_pulse_out~46.OUTPUTSELECT
acceleration[16] => second_pulse_out~47.OUTPUTSELECT
acceleration[16] => second_pulse_out~48.OUTPUTSELECT
acceleration[16] => second_pulse_out~49.OUTPUTSELECT
acceleration[16] => second_pulse_out~50.OUTPUTSELECT
acceleration[16] => second_pulse_out~51.OUTPUTSELECT
acceleration[16] => second_pulse_out~52.OUTPUTSELECT
acceleration[16] => second_pulse_out~53.OUTPUTSELECT
acceleration[16] => second_pulse_out~54.OUTPUTSELECT
acceleration[16] => second_pulse_out~55.OUTPUTSELECT
acceleration[16] => second_pulse_out~56.OUTPUTSELECT
acceleration[16] => second_pulse_out~57.OUTPUTSELECT
acceleration[16] => second_pulse_out~58.OUTPUTSELECT
acceleration[16] => second_pulse_out~59.OUTPUTSELECT
acceleration[16] => second_pulse_out~60.OUTPUTSELECT
acceleration[16] => second_pulse_out~61.OUTPUTSELECT
acceleration[16] => second_pulse_out~62.OUTPUTSELECT
acceleration[16] => second_pulse_out~63.OUTPUTSELECT
second_pulse_out[0] <= second_pulse_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[1] <= second_pulse_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[2] <= second_pulse_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[3] <= second_pulse_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[4] <= second_pulse_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[5] <= second_pulse_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[6] <= second_pulse_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[7] <= second_pulse_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[8] <= second_pulse_out[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[9] <= second_pulse_out[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[10] <= second_pulse_out[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[11] <= second_pulse_out[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[12] <= second_pulse_out[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[13] <= second_pulse_out[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[14] <= second_pulse_out[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_pulse_out[15] <= second_pulse_out[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE