main.map.eqn

一些很好的FPGA设计实例

--N3_cs_buffer[13] is second_pulse_latch:inst3|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[13]
--operation mode is arithmetic

N3_cs_buffer[13] = Acceleration[12] $ E1_second_pulse_out[12] $ N3_cout[12];

--N3_cout[13] is second_pulse_latch:inst3|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[13]
--operation mode is arithmetic

N3_cout[13] = CARRY(Acceleration[12] & E1_second_pulse_out[12] & N3_cout[12] # !Acceleration[12] & E1_second_pulse_out[12] # N3_cout[12]);


--N6_cs_buffer[11] is second_pulse_latch:inst3|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[11]
--operation mode is arithmetic

N6_cs_buffer[11] = Acceleration[11] $ E1_second_pulse_out[11] $ N6_cout[10];

--N6_cout[11] is second_pulse_latch:inst3|lpm_add_sub:add_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[11]
--operation mode is arithmetic

N6_cout[11] = CARRY(Acceleration[11] & E1_second_pulse_out[11] # N6_cout[10] # !Acceleration[11] & E1_second_pulse_out[11] & N6_cout[10]);


--N3_cs_buffer[12] is second_pulse_latch:inst3|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[12]
--operation mode is arithmetic

N3_cs_buffer[12] = Acceleration[11] $ E1_second_pulse_out[11] $ N3_cout[11];

--N3_cout[12] is second_pulse_latch:inst3|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[12]
--operation mode is arithmetic

N3_cout[12] = CARRY(Acceleration[11] & E1_second_pulse_out[11] & N3_cout[11] # !Acceleration[11] & E1_second_pulse_out[11] # N3_cout[11]);


--N9_cs_buffer[17] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[17]
--operation mode is arithmetic

N9_cs_buffer[17] = Step_Sum[17] $ (N9_cout[16]);

--N9_cout[17] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[17]
--operation mode is arithmetic

N9_cout[17] = CARRY(Step_Sum[17] # N9_cout[16]);


--N9_cs_buffer[7] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]
--operation mode is arithmetic

N9_cs_buffer[7] = Step_Sum[7] $ (N9_cout[6]);

--N9_cout[7] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[7]
--operation mode is arithmetic

N9_cout[7] = CARRY(Step_Sum[7] # N9_cout[6]);


--G1L21 is sum_control:inst5|reduce_nor~282
--operation mode is normal

G1L21 = N9_cs_buffer[17] & !J3_q[17] & N9_cs_buffer[7] $ J3_q[7] # !N9_cs_buffer[17] & J3_q[17] & N9_cs_buffer[7] $ J3_q[7];


--N9_cs_buffer[22] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[22]
--operation mode is arithmetic

N9_cs_buffer[22] = Step_Sum[22] $ (N9_cout[21]);

--N9_cout[22] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[22]
--operation mode is arithmetic

N9_cout[22] = CARRY(Step_Sum[22] # N9_cout[21]);


--N9_cs_buffer[10] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[10]
--operation mode is arithmetic

N9_cs_buffer[10] = Step_Sum[10] $ (N9_cout[9]);

--N9_cout[10] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[10]
--operation mode is arithmetic

N9_cout[10] = CARRY(Step_Sum[10] # N9_cout[9]);


--G1L81 is sum_control:inst5|reduce_nor~294
--operation mode is normal

G1L81 = (N9_cs_buffer[22] & !J3_q[22] & N9_cs_buffer[10] $ J3_q[10] # !N9_cs_buffer[22] & J3_q[22] & N9_cs_buffer[10] $ J3_q[10]) & CASCADE(G1L21);


--N9_cs_buffer[4] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

N9_cs_buffer[4] = Step_Sum[4] $ (N9_cout[3]);

--N9_cout[4] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

N9_cout[4] = CARRY(Step_Sum[4] # N9_cout[3]);


--N9_cs_buffer[15] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[15]
--operation mode is arithmetic

N9_cs_buffer[15] = Step_Sum[15] $ (N9_cout[14]);

--N9_cout[15] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[15]
--operation mode is arithmetic

N9_cout[15] = CARRY(Step_Sum[15] # N9_cout[14]);


--G1L31 is sum_control:inst5|reduce_nor~284
--operation mode is normal

G1L31 = N9_cs_buffer[4] & !J3_q[4] & N9_cs_buffer[15] $ J3_q[15] # !N9_cs_buffer[4] & J3_q[4] & N9_cs_buffer[15] $ J3_q[15];


--N9_cs_buffer[2] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

N9_cs_buffer[2] = Step_Sum[2] $ (N9_cout[1]);

--N9_cout[2] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

N9_cout[2] = CARRY(Step_Sum[2] # N9_cout[1]);


--N9_cs_buffer[0] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]
--operation mode is arithmetic

N9_cs_buffer[0] = Step_Sum[0];

--N9_cout[0] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

N9_cout[0] = CARRY(Step_Sum[0]);


--G1L91 is sum_control:inst5|reduce_nor~295
--operation mode is normal

G1L91 = (N9_cs_buffer[2] & !J3_q[2] & N9_cs_buffer[0] $ J3_q[0] # !N9_cs_buffer[2] & J3_q[2] & N9_cs_buffer[0] $ J3_q[0]) & CASCADE(G1L31);


--N9_cs_buffer[20] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[20]
--operation mode is arithmetic

N9_cs_buffer[20] = Step_Sum[20] $ (N9_cout[19]);

--N9_cout[20] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[20]
--operation mode is arithmetic

N9_cout[20] = CARRY(Step_Sum[20] # N9_cout[19]);


--N9_cs_buffer[18] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[18]
--operation mode is arithmetic

N9_cs_buffer[18] = Step_Sum[18] $ (N9_cout[17]);

--N9_cout[18] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[18]
--operation mode is arithmetic

N9_cout[18] = CARRY(Step_Sum[18] # N9_cout[17]);


--G1L41 is sum_control:inst5|reduce_nor~286
--operation mode is normal

G1L41 = N9_cs_buffer[20] & !J3_q[20] & N9_cs_buffer[18] $ J3_q[18] # !N9_cs_buffer[20] & J3_q[20] & N9_cs_buffer[18] $ J3_q[18];


--N9_cs_buffer[13] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[13]
--operation mode is arithmetic

N9_cs_buffer[13] = Step_Sum[13] $ (N9_cout[12]);

--N9_cout[13] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[13]
--operation mode is arithmetic

N9_cout[13] = CARRY(Step_Sum[13] # N9_cout[12]);


--N9_cs_buffer[21] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[21]
--operation mode is arithmetic

N9_cs_buffer[21] = Step_Sum[21] $ (N9_cout[20]);

--N9_cout[21] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[21]
--operation mode is arithmetic

N9_cout[21] = CARRY(Step_Sum[21] # N9_cout[20]);


--G1L02 is sum_control:inst5|reduce_nor~296
--operation mode is normal

G1L02 = (N9_cs_buffer[13] & !J3_q[13] & N9_cs_buffer[21] $ J3_q[21] # !N9_cs_buffer[13] & J3_q[13] & N9_cs_buffer[21] $ J3_q[21]) & CASCADE(G1L41);


--N9_cs_buffer[3] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

N9_cs_buffer[3] = Step_Sum[3] $ (N9_cout[2]);

--N9_cout[3] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

N9_cout[3] = CARRY(Step_Sum[3] # N9_cout[2]);


--G1L51 is sum_control:inst5|reduce_nor~288
--operation mode is normal

G1L51 = L3_unreg_res_node[23] & !J3_q[23] & N9_cs_buffer[3] $ J3_q[3] # !L3_unreg_res_node[23] & J3_q[23] & N9_cs_buffer[3] $ J3_q[3];


--N9_cs_buffer[5] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

N9_cs_buffer[5] = Step_Sum[5] $ (N9_cout[4]);

--N9_cout[5] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

N9_cout[5] = CARRY(Step_Sum[5] # N9_cout[4]);


--N9_cs_buffer[19] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[19]
--operation mode is arithmetic

N9_cs_buffer[19] = Step_Sum[19] $ (N9_cout[18]);

--N9_cout[19] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[19]
--operation mode is arithmetic

N9_cout[19] = CARRY(Step_Sum[19] # N9_cout[18]);


--G1L12 is sum_control:inst5|reduce_nor~297
--operation mode is normal

G1L12 = (N9_cs_buffer[5] & !J3_q[5] & N9_cs_buffer[19] $ J3_q[19] # !N9_cs_buffer[5] & J3_q[5] & N9_cs_buffer[19] $ J3_q[19]) & CASCADE(G1L51);


--N9_cs_buffer[9] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[9]
--operation mode is arithmetic

N9_cs_buffer[9] = Step_Sum[9] $ (N9_cout[8]);

--N9_cout[9] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[9]
--operation mode is arithmetic

N9_cout[9] = CARRY(Step_Sum[9] # N9_cout[8]);


--N9_cs_buffer[12] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[12]
--operation mode is arithmetic

N9_cs_buffer[12] = Step_Sum[12] $ (N9_cout[11]);

--N9_cout[12] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[12]
--operation mode is arithmetic

N9_cout[12] = CARRY(Step_Sum[12] # N9_cout[11]);


--G1L61 is sum_control:inst5|reduce_nor~290
--operation mode is normal

G1L61 = N9_cs_buffer[9] & !J3_q[9] & N9_cs_buffer[12] $ J3_q[12] # !N9_cs_buffer[9] & J3_q[9] & N9_cs_buffer[12] $ J3_q[12];


--N9_cs_buffer[8] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8]
--operation mode is arithmetic

N9_cs_buffer[8] = Step_Sum[8] $ (N9_cout[7]);

--N9_cout[8] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[8]
--operation mode is arithmetic

N9_cout[8] = CARRY(Step_Sum[8] # N9_cout[7]);


--N9_cs_buffer[16] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[16]
--operation mode is arithmetic

N9_cs_buffer[16] = Step_Sum[16] $ (N9_cout[15]);

--N9_cout[16] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[16]
--operation mode is arithmetic

N9_cout[16] = CARRY(Step_Sum[16] # N9_cout[15]);


--G1L22 is sum_control:inst5|reduce_nor~298
--operation mode is normal

G1L22 = (N9_cs_buffer[8] & !J3_q[8] & N9_cs_buffer[16] $ J3_q[16] # !N9_cs_buffer[8] & J3_q[8] & N9_cs_buffer[16] $ J3_q[16]) & CASCADE(G1L61);


--N9_cs_buffer[14] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[14]
--operation mode is arithmetic

N9_cs_buffer[14] = Step_Sum[14] $ (N9_cout[13]);

--N9_cout[14] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[14]
--operation mode is arithmetic

N9_cout[14] = CARRY(Step_Sum[14] # N9_cout[13]);


--N9_cs_buffer[6] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

N9_cs_buffer[6] = Step_Sum[6] $ (N9_cout[5]);

--N9_cout[6] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

N9_cout[6] = CARRY(Step_Sum[6] # N9_cout[5]);


--G1L71 is sum_control:inst5|reduce_nor~292
--operation mode is normal

G1L71 = N9_cs_buffer[14] & !J3_q[14] & N9_cs_buffer[6] $ J3_q[6] # !N9_cs_buffer[14] & J3_q[14] & N9_cs_buffer[6] $ J3_q[6];


--N9_cs_buffer[11] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[11]
--operation mode is arithmetic

N9_cs_buffer[11] = Step_Sum[11] $ (N9_cout[10]);

--N9_cout[11] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[11]
--operation mode is arithmetic

N9_cout[11] = CARRY(Step_Sum[11] # N9_cout[10]);


--N9_cs_buffer[1] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

N9_cs_buffer[1] = Step_Sum[1] $ (N9_cout[0]);

--N9_cout[1] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

N9_cout[1] = CARRY(Step_Sum[1] # N9_cout[0]);


--G1L32 is sum_control:inst5|reduce_nor~299
--operation mode is normal

G1L32 = (N9_cs_buffer[11] & !J3_q[11] & N9_cs_buffer[1] $ J3_q[1] # !N9_cs_buffer[11] & J3_q[11] & N9_cs_buffer[1] $ J3_q[1]) & CASCADE(G1L71);


--L2_unreg_res_node[14] is second_pulse_latch:inst3|lpm_add_sub:add_rtl_5|addcore:adder|unreg_res_node[14]
--operation mode is normal

L2_unreg_res_node[14] = E1_second_pulse_out[14] $ Acceleration[14] $ N6_cout[13];


--L1_unreg_res_node[15] is second_pulse_latch:inst3|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[15]
--operation mode is normal

L1_unreg_res_node[15] = Acceleration[14] $ E1_second_pulse_out[14] $ N3_cout[14];


--L3_unreg_res_node[23] is sum_control:inst5|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[23]
--operation mode is normal

L3_unreg_res_node[23] = N9_cout[22] $ Step_Sum[23];


--Initial_Speed[15] is Initial_Speed[15]
--operation mode is input

Initial_Speed[15] = INPUT();