main.map.eqn

一些很好的FPGA设计实例

--G1_out_control is sum_control:inst5|out_control
--operation mode is normal

G1_out_control_lut_out = G1L01;
G1_out_control = DFFEA(G1_out_control_lut_out, F1L93, , , , , );


--F1L04 is pulse_sum:inst4|pulse_out~126
--operation mode is normal

F1L04 = F1_pulse_1[6] # F1_pulse_1[5] # F1_pulse_1[4] # F1_pulse_1[3];


--F1L14 is pulse_sum:inst4|pulse_out~127
--operation mode is normal

F1L14 = F1L04 # F1_pulse_1[2] # F1_pulse_1[1] # F1_pulse_1[0];


--G1_wave_out is sum_control:inst5|wave_out
--operation mode is normal

G1_wave_out = G1_out_control & !Reset & F1L14 # !F1L34;


--F1L93 is pulse_sum:inst4|pulse_out~16
--operation mode is normal

F1L93 = !Reset & F1L14 # !F1L34;


--J1_q[1] is fdiv:inst|lpm_counter:CNT_rtl_1|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

J1_q[1]_lut_out = (J1_q[1] $ J1L3) & B1L1;
J1_q[1] = DFFEA(J1_q[1]_lut_out, Clock_8MHz, , , , , );

--J1L5 is fdiv:inst|lpm_counter:CNT_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

J1L5 = CARRY(J1_q[1] & J1L3);


--J2_q[0] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is clrb_cntr

J2_q[0]_lut_out = (!J2_q[0]) & C1L5;
J2_q[0] = DFFEA(J2_q[0]_lut_out, J1_q[1], , , , , );

--J2L3 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is clrb_cntr

J2L3 = CARRY(J2_q[0]);


--J2_q[1] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

J2_q[1]_lut_out = (J2_q[1] $ J2L3) & C1L5;
J2_q[1] = DFFEA(J2_q[1]_lut_out, J1_q[1], , , , , );

--J2L5 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

J2L5 = CARRY(J2_q[1] & J2L3);


--F1L13 is pulse_sum:inst4|pulse_1~418
--operation mode is normal

F1L13 = J1_q[1] & !J2_q[0] & !J2_q[1];


--J2_q[2] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

J2_q[2]_lut_out = (J2_q[2] $ J2L5) & C1L5;
J2_q[2] = DFFEA(J2_q[2]_lut_out, J1_q[1], , , , , );

--J2L7 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

J2L7 = CARRY(J2_q[2] & J2L5);


--J2_q[3] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is clrb_cntr

J2_q[3]_lut_out = (J2_q[3] $ J2L7) & C1L5;
J2_q[3] = DFFEA(J2_q[3]_lut_out, J1_q[1], , , , , );

--J2L9 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT
--operation mode is clrb_cntr

J2L9 = CARRY(J2_q[3] & J2L7);


--F1L23 is pulse_sum:inst4|pulse_1~419
--operation mode is normal

F1L23 = F1L13 & !J2_q[2] & !J2_q[3];


--J2_q[4] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is clrb_cntr

J2_q[4]_lut_out = (J2_q[4] $ J2L9) & C1L5;
J2_q[4] = DFFEA(J2_q[4]_lut_out, J1_q[1], , , , , );

--J2L11 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT
--operation mode is clrb_cntr

J2L11 = CARRY(J2_q[4] & J2L9);


--J2_q[5] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[5]
--operation mode is clrb_cntr

J2_q[5]_lut_out = (J2_q[5] $ J2L11) & C1L5;
J2_q[5] = DFFEA(J2_q[5]_lut_out, J1_q[1], , , , , );

--J2L31 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT
--operation mode is clrb_cntr

J2L31 = CARRY(J2_q[5] & J2L11);


--F1L33 is pulse_sum:inst4|pulse_1~420
--operation mode is normal

F1L33 = F1L23 & !J2_q[4] & !J2_q[5];


--J2_q[6] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[6]
--operation mode is clrb_cntr

J2_q[6]_lut_out = (J2_q[6] $ J2L31) & C1L5;
J2_q[6] = DFFEA(J2_q[6]_lut_out, J1_q[1], , , , , );

--J2L51 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT
--operation mode is clrb_cntr

J2L51 = CARRY(J2_q[6] & J2L31);


--J2_q[7] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[7]
--operation mode is clrb_cntr

J2_q[7]_lut_out = (J2_q[7] $ J2L51) & C1L5;
J2_q[7] = DFFEA(J2_q[7]_lut_out, J1_q[1], , , , , );

--J2L71 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[7]~COUT
--operation mode is clrb_cntr

J2L71 = CARRY(J2_q[7] & J2L51);


--F1L43 is pulse_sum:inst4|pulse_1~421
--operation mode is normal

F1L43 = F1L33 & !J2_q[6] & !J2_q[7];


--E1_second_pulse_out[6] is second_pulse_latch:inst3|second_pulse_out[6]
--operation mode is normal

E1_second_pulse_out[6]_lut_out = !Reset & Acceleration[16] & !N3_cs_buffer[7] # !Acceleration[16] & N6_cs_buffer[6];
E1_second_pulse_out[6] = DFFEA(E1_second_pulse_out[6]_lut_out, J1_q[3], , , , , );


--J2_q[9] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[9]
--operation mode is clrb_cntr

J2_q[9]_lut_out = (J2_q[9] $ J2L91) & C1L5;
J2_q[9] = DFFEA(J2_q[9]_lut_out, J1_q[1], , , , , );

--J2L12 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[9]~COUT
--operation mode is clrb_cntr

J2L12 = CARRY(J2_q[9] & J2L91);


--J2_q[8] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[8]
--operation mode is clrb_cntr

J2_q[8]_lut_out = (J2_q[8] $ J2L71) & C1L5;
J2_q[8] = DFFEA(J2_q[8]_lut_out, J1_q[1], , , , , );

--J2L91 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[8]~COUT
--operation mode is clrb_cntr

J2L91 = CARRY(J2_q[8] & J2L71);


--F1L32 is pulse_sum:inst4|pulse_1~13
--operation mode is normal

F1L32 = F1L43 & E1_second_pulse_out[6] & J2_q[9] & !J2_q[8];


--F1_pulse_1[6] is pulse_sum:inst4|pulse_1[6]
--operation mode is normal

F1_pulse_1[6] = Reset & F1_pulse_1[6] # !Reset & F1L32;


--F1L53 is pulse_sum:inst4|pulse_1~422
--operation mode is normal

F1L53 = F1L43 & !J2_q[8] & !J2_q[9];


--E1_second_pulse_out[5] is second_pulse_latch:inst3|second_pulse_out[5]
--operation mode is normal

E1_second_pulse_out[5]_lut_out = !Reset & Acceleration[16] & !N3_cs_buffer[6] # !Acceleration[16] & N6_cs_buffer[5];
E1_second_pulse_out[5] = DFFEA(E1_second_pulse_out[5]_lut_out, J1_q[3], , , , , );


--J2_q[10] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[10]
--operation mode is clrb_cntr

J2_q[10]_lut_out = (J2_q[10] $ J2L12) & C1L5;
J2_q[10] = DFFEA(J2_q[10]_lut_out, J1_q[1], , , , , );

--J2L32 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[10]~COUT
--operation mode is clrb_cntr

J2L32 = CARRY(J2_q[10] & J2L12);


--F1L22 is pulse_sum:inst4|pulse_1~11
--operation mode is normal

F1L22 = F1L53 & E1_second_pulse_out[5] & J2_q[10];


--F1_pulse_1[5] is pulse_sum:inst4|pulse_1[5]
--operation mode is normal

F1_pulse_1[5] = Reset & F1_pulse_1[5] # !Reset & F1L22;


--E1_second_pulse_out[4] is second_pulse_latch:inst3|second_pulse_out[4]
--operation mode is normal

E1_second_pulse_out[4]_lut_out = !Reset & Acceleration[16] & !N3_cs_buffer[5] # !Acceleration[16] & N6_cs_buffer[4];
E1_second_pulse_out[4] = DFFEA(E1_second_pulse_out[4]_lut_out, J1_q[3], , , , , );


--J2_q[11] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[11]
--operation mode is clrb_cntr

J2_q[11]_lut_out = (J2_q[11] $ J2L32) & C1L5;
J2_q[11] = DFFEA(J2_q[11]_lut_out, J1_q[1], , , , , );

--J2L52 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[11]~COUT
--operation mode is clrb_cntr

J2L52 = CARRY(J2_q[11] & J2L32);


--F1L12 is pulse_sum:inst4|pulse_1~9
--operation mode is normal

F1L12 = F1L53 & E1_second_pulse_out[4] & J2_q[11] & !J2_q[10];


--F1_pulse_1[4] is pulse_sum:inst4|pulse_1[4]
--operation mode is normal

F1_pulse_1[4] = Reset & F1_pulse_1[4] # !Reset & F1L12;


--F1L63 is pulse_sum:inst4|pulse_1~423
--operation mode is normal

F1L63 = F1L53 & !J2_q[10] & !J2_q[11];


--E1_second_pulse_out[3] is second_pulse_latch:inst3|second_pulse_out[3]
--operation mode is normal

E1_second_pulse_out[3]_lut_out = !Reset & Acceleration[16] & !N3_cs_buffer[4] # !Acceleration[16] & N6_cs_buffer[3];
E1_second_pulse_out[3] = DFFEA(E1_second_pulse_out[3]_lut_out, J1_q[3], , , , , );


--J2_q[12] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[12]
--operation mode is clrb_cntr

J2_q[12]_lut_out = (J2_q[12] $ J2L52) & C1L5;
J2_q[12] = DFFEA(J2_q[12]_lut_out, J1_q[1], , , , , );

--J2L72 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[12]~COUT
--operation mode is clrb_cntr

J2L72 = CARRY(J2_q[12] & J2L52);


--F1L02 is pulse_sum:inst4|pulse_1~7
--operation mode is normal

F1L02 = F1L63 & E1_second_pulse_out[3] & J2_q[12];


--F1_pulse_1[3] is pulse_sum:inst4|pulse_1[3]
--operation mode is normal

F1_pulse_1[3] = Reset & F1_pulse_1[3] # !Reset & F1L02;


--E1_second_pulse_out[2] is second_pulse_latch:inst3|second_pulse_out[2]
--operation mode is normal

E1_second_pulse_out[2]_lut_out = !Reset & Acceleration[16] & !N3_cs_buffer[3] # !Acceleration[16] & N6_cs_buffer[2];
E1_second_pulse_out[2] = DFFEA(E1_second_pulse_out[2]_lut_out, J1_q[3], , , , , );


--J2_q[13] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[13]
--operation mode is clrb_cntr

J2_q[13]_lut_out = (J2_q[13] $ J2L72) & C1L5;
J2_q[13] = DFFEA(J2_q[13]_lut_out, J1_q[1], , , , , );

--J2L92 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[13]~COUT
--operation mode is clrb_cntr

J2L92 = CARRY(J2_q[13] & J2L72);


--F1L91 is pulse_sum:inst4|pulse_1~5
--operation mode is normal

F1L91 = F1L63 & E1_second_pulse_out[2] & J2_q[13] & !J2_q[12];


--F1_pulse_1[2] is pulse_sum:inst4|pulse_1[2]
--operation mode is normal

F1_pulse_1[2] = Reset & F1_pulse_1[2] # !Reset & F1L91;


--F1L73 is pulse_sum:inst4|pulse_1~424
--operation mode is normal

F1L73 = F1L63 & !J2_q[12] & !J2_q[13];


--E1_second_pulse_out[1] is second_pulse_latch:inst3|second_pulse_out[1]
--operation mode is normal

E1_second_pulse_out[1]_lut_out = !Reset & Acceleration[16] & !N3_cs_buffer[2] # !Acceleration[16] & N6_cs_buffer[1];
E1_second_pulse_out[1] = DFFEA(E1_second_pulse_out[1]_lut_out, J1_q[3], , , , , );


--J2_q[14] is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|q[14]
--operation mode is clrb_cntr

J2_q[14]_lut_out = (J2_q[14] $ J2L92) & C1L5;
J2_q[14] = DFFEA(J2_q[14]_lut_out, J1_q[1], , , , , );

--J2L13 is counter_16_bits:inst1|lpm_counter:counter_out_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[14]~COUT
--operation mode is clrb_cntr

J2L13 = CARRY(J2_q[14] & J2L92);


--F1L81 is pulse_sum:inst4|pulse_1~3
--operation mode is normal

F1L81 = F1L73 & E1_second_pulse_out[1] & J2_q[14];


--F1_pulse_1[1] is pulse_sum:inst4|pulse_1[1]
--operation mode is normal

F1_pulse_1[1] = Reset & F1_pulse_1[1] # !Reset & F1L81;


--E1_second_pulse_out[0] is second_pulse_latch:inst3|second_pulse_out[0]
--operation mode is normal