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📄 main.map.rpt

📁 一些很好的FPGA设计实例
💻 RPT
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; Total registers      ; 192                       ;
; I/O pins             ; 20                        ;
; Shareable expanders  ; 29                        ;
; Parallel expanders   ; 9                         ;
; Maximum fan-out node ; gate_control:inst3|wire_1 ;
; Maximum fan-out      ; 56                        ;
; Total fan-out        ; 3216                      ;
; Average fan-out      ; 10.76                     ;
+----------------------+---------------------------+


+----------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                          ;
+--------------------------------+------------+------+-----------------------------------------+
; Compilation Hierarchy Node     ; Macrocells ; Pins ; Full Hierarchy Name                     ;
+--------------------------------+------------+------+-----------------------------------------+
; |main                          ; 250        ; 20   ; |main                                   ;
;    |counter:inst|              ; 27         ; 0    ; |main|counter:inst                      ;
;       |lpm_counter:Q0_rtl_1|   ; 4          ; 0    ; |main|counter:inst|lpm_counter:Q0_rtl_1 ;
;       |lpm_counter:Q1_rtl_2|   ; 4          ; 0    ; |main|counter:inst|lpm_counter:Q1_rtl_2 ;
;       |lpm_counter:Q2_rtl_3|   ; 4          ; 0    ; |main|counter:inst|lpm_counter:Q2_rtl_3 ;
;       |lpm_counter:Q3_rtl_4|   ; 4          ; 0    ; |main|counter:inst|lpm_counter:Q3_rtl_4 ;
;       |lpm_counter:Q4_rtl_5|   ; 4          ; 0    ; |main|counter:inst|lpm_counter:Q4_rtl_5 ;
;       |lpm_counter:Q5_rtl_0|   ; 4          ; 0    ; |main|counter:inst|lpm_counter:Q5_rtl_0 ;
;    |data_mux:inst8|            ; 8          ; 0    ; |main|data_mux:inst8                    ;
;    |dispdecoder:inst5|         ; 24         ; 0    ; |main|dispdecoder:inst5                 ;
;    |dispselect:inst7|          ; 9          ; 0    ; |main|dispselect:inst7                  ;
;    |fdiv:inst1|                ; 151        ; 0    ; |main|fdiv:inst1                        ;
;       |lpm_counter:cnt1_rtl_6| ; 35         ; 0    ; |main|fdiv:inst1|lpm_counter:cnt1_rtl_6 ;
;       |lpm_counter:cnt2_rtl_7| ; 36         ; 0    ; |main|fdiv:inst1|lpm_counter:cnt2_rtl_7 ;
;       |lpm_counter:cnt3_rtl_9| ; 36         ; 0    ; |main|fdiv:inst1|lpm_counter:cnt3_rtl_9 ;
;       |lpm_counter:cnt4_rtl_8| ; 36         ; 0    ; |main|fdiv:inst1|lpm_counter:cnt4_rtl_8 ;
;    |flip_latch:inst2|          ; 24         ; 0    ; |main|flip_latch:inst2                  ;
;    |gate_control:inst3|        ; 7          ; 0    ; |main|gate_control:inst3                ;
+--------------------------------+------------+------+-----------------------------------------+


+-------------------------------------------------------------------------------------------------------------+
; User-Specified and Inferred Latches                                                                         ;
+-----------------------------------------------------+------------------------------+------------------------+
; Latch Name                                          ; Latch Enable Signal          ; Free of Timing Hazards ;
+-----------------------------------------------------+------------------------------+------------------------+
; gate_control:inst3|dp_s1hz                          ; GND                          ; yes                    ;
; gate_control:inst3|dp_s100hz                        ; GND                          ; yes                    ;
; gate_control:inst3|dp_s10hz                         ; GND                          ; yes                    ;
; dispdecoder:inst5|data_out[6]                       ; dispdecoder:inst5|Selector0  ; yes                    ;
; dispdecoder:inst5|data_out[5]                       ; dispdecoder:inst5|Selector0  ; yes                    ;
; dispdecoder:inst5|data_out[4]                       ; dispdecoder:inst5|Selector0  ; yes                    ;
; dispdecoder:inst5|data_out[3]                       ; dispdecoder:inst5|Selector0  ; yes                    ;
; dispdecoder:inst5|data_out[2]                       ; dispdecoder:inst5|Selector0  ; yes                    ;
; dispdecoder:inst5|data_out[1]                       ; dispdecoder:inst5|Selector0  ; yes                    ;
; dispdecoder:inst5|data_out[0]                       ; dispdecoder:inst5|Selector0  ; yes                    ;
; gate_control:inst3|fref                             ; gate_control:inst3|always0~1 ; yes                    ;
; Number of user-specified and inferred latches = 11  ;                              ;                        ;
+-----------------------------------------------------+------------------------------+------------------------+
Note: All latches listed above may not be present at the end of synthesis due to various synthesis optimizations.


+------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: counter:inst|lpm_counter:Q5_rtl_0 ;
+------------------------+-------------------+---------------------------------------+
; Parameter Name         ; Value             ; Type                                  ;
+------------------------+-------------------+---------------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                            ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                          ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                          ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE                        ;
; LPM_WIDTH              ; 4                 ; Untyped                               ;
; LPM_DIRECTION          ; UP                ; Untyped                               ;
; LPM_MODULUS            ; 0                 ; Untyped                               ;
; LPM_AVALUE             ; UNUSED            ; Untyped                               ;
; LPM_SVALUE             ; UNUSED            ; Untyped                               ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                               ;
; DEVICE_FAMILY          ; MAX7000S          ; Untyped                               ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                               ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH                    ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK                    ;
; CARRY_CNT_EN           ; SMART             ; Untyped                               ;
; LABWIDE_SCLR           ; ON                ; Untyped                               ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                               ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                               ;
+------------------------+-------------------+---------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: counter:inst|lpm_counter:Q0_rtl_1 ;
+------------------------+-------------------+---------------------------------------+
; Parameter Name         ; Value             ; Type                                  ;
+------------------------+-------------------+---------------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                            ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                          ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                          ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE                        ;
; LPM_WIDTH              ; 4                 ; Untyped                               ;
; LPM_DIRECTION          ; UP                ; Untyped                               ;
; LPM_MODULUS            ; 0                 ; Untyped                               ;
; LPM_AVALUE             ; UNUSED            ; Untyped                               ;
; LPM_SVALUE             ; UNUSED            ; Untyped                               ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                               ;
; DEVICE_FAMILY          ; MAX7000S          ; Untyped                               ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                               ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH                    ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK                    ;
; CARRY_CNT_EN           ; SMART             ; Untyped                               ;
; LABWIDE_SCLR           ; ON                ; Untyped                               ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                               ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                               ;
+------------------------+-------------------+---------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: counter:inst|lpm_counter:Q1_rtl_2 ;
+------------------------+-------------------+---------------------------------------+
; Parameter Name         ; Value             ; Type                                  ;
+------------------------+-------------------+---------------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                            ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                          ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                          ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE                        ;
; LPM_WIDTH              ; 4                 ; Untyped                               ;
; LPM_DIRECTION          ; UP                ; Untyped                               ;
; LPM_MODULUS            ; 0                 ; Untyped                               ;
; LPM_AVALUE             ; UNUSED            ; Untyped                               ;
; LPM_SVALUE             ; UNUSED            ; Untyped                               ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                               ;
; DEVICE_FAMILY          ; MAX7000S          ; Untyped                               ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                               ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH                    ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK                    ;
; CARRY_CNT_EN           ; SMART             ; Untyped                               ;
; LABWIDE_SCLR           ; ON                ; Untyped                               ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                               ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                               ;
+------------------------+-------------------+---------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------+

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