⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 main.map.smsg

📁 一些很好的FPGA设计实例
💻 SMSG
字号:
Warning (10268): Verilog HDL information at fdiv.v(9): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at fdiv.v(24): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at fdiv.v(39): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at fdiv.v(54): Always Construct contains both blocking and non-blocking assignments

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -