block1.fit.summary

来自「一些很好的FPGA设计实例」· SUMMARY 代码 · 共 12 行

Fitter Status : Successful - Fri Mar 30 21:39:11 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : Block1
Top-level Entity Name : Block1
Family : ACEX1K
Device : EP1K30QC208-2
Timing Models : Final
Total logic elements : 2 / 1,728 ( < 1 % )
Total pins : 4 / 147 ( 3 % )
Total memory bits : 0 / 24,576 ( 0 % )
Total PLLs : 0 / 1 ( 0 % )