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📄 gift2.sim.rpt

📁 一些很好的FPGA设计实例
💻 RPT
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+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      12.28 % ;
; Total nodes checked                                 ; 140          ;
; Total output ports checked                          ; 171          ;
; Total output ports with complete 1/0-value coverage ; 21           ;
; Total output ports with no 1/0-value coverage       ; 150          ;
; Total output ports with no 1-value coverage         ; 150          ;
; Total output ports with no 0-value coverage         ; 150          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                        ;
+----------------------------------------------------------------+--------------------------------------------------------------------------------+------------------+
; Node Name                                                      ; Output Port Name                                                               ; Output Port Type ;
+----------------------------------------------------------------+--------------------------------------------------------------------------------+------------------+
; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[0] ; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[0]                 ; data_out0        ;
; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[0] ; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT ; cout             ;
; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[1] ; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[1]                 ; data_out0        ;
; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[1] ; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT ; cout             ;
; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[2]                 ; data_out0        ;
; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT ; cout             ;
; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[3] ; |gift2|lpm_counter:y_rtl_0|alt_counter_f10ke:wysi_counter|q[3]                 ; data_out0        ;
; |gift2|WideOr0~64                                              ; |gift2|WideOr0~64                                                              ; data_out0        ;
; |gift2|WideOr4~4                                               ; |gift2|WideOr4~4                                                               ; data_out0        ;
; |gift2|WideOr2~4                                               ; |gift2|WideOr2~4                                                               ; data_out0        ;
; |gift2|WideOr1~4                                               ; |gift2|WideOr1~4                                                               ; data_out0        ;
; |gift2|WideOr7~4                                               ; |gift2|WideOr7~4                                                               ; data_out0        ;
; |gift2|clk                                                     ; |gift2|clk                                                                     ; dataout          ;
; |gift2|y[0]                                                    ; |gift2|y[0]                                                                    ; padio            ;
; |gift2|y[1]                                                    ; |gift2|y[1]                                                                    ; padio            ;
; |gift2|y[2]                                                    ; |gift2|y[2]                                                                    ; padio            ;
; |gift2|y[3]                                                    ; |gift2|y[3]                                                                    ; padio            ;
; |gift2|y[0]~9                                                  ; |gift2|y[0]~9                                                                  ; data_out0        ;
; |gift2|y[1]~10                                                 ; |gift2|y[1]~10                                                                 ; data_out0        ;
; |gift2|y[2]~11                                                 ; |gift2|y[2]~11                                                                 ; data_out0        ;
; |gift2|y[3]~12                                                 ; |gift2|y[3]~12                                                                 ; data_out0        ;
+----------------------------------------------------------------+--------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                                                     ;
+-----------------------------------------------------------------------------+-----------------------------------------------------------------------------+------------------+
; Node Name                                                                   ; Output Port Name                                                            ; Output Port Type ;
+-----------------------------------------------------------------------------+-----------------------------------------------------------------------------+------------------+
; |gift2|c[2]~reg0                                                            ; |gift2|c[2]~reg0                                                            ; data_out0        ;
; |gift2|c[3]~reg0                                                            ; |gift2|c[3]~reg0                                                            ; data_out0        ;
; |gift2|c[4]~reg0                                                            ; |gift2|c[4]~reg0                                                            ; data_out0        ;
; |gift2|c[7]~reg0                                                            ; |gift2|c[7]~reg0                                                            ; data_out0        ;
; |gift2|c[8]~reg0                                                            ; |gift2|c[8]~reg0                                                            ; data_out0        ;
; |gift2|c[9]~reg0                                                            ; |gift2|c[9]~reg0                                                            ; data_out0        ;
; |gift2|c[10]~reg0                                                           ; |gift2|c[10]~reg0                                                           ; data_out0        ;
; |gift2|c[11]~reg0                                                           ; |gift2|c[11]~reg0                                                           ; data_out0        ;
; |gift2|c[13]~reg0                                                           ; |gift2|c[13]~reg0                                                           ; data_out0        ;
; |gift2|i[0]                                                                 ; |gift2|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:result_node|cout[0]       ; cout             ;
; |gift2|i[7]                                                                 ; |gift2|i[7]                                                                 ; data_out0        ;
; |gift2|i[6]                                                                 ; |gift2|i[6]                                                                 ; data_out0        ;
; |gift2|i[5]                                                                 ; |gift2|i[5]                                                                 ; data_out0        ;
; |gift2|i[4]                                                                 ; |gift2|i[4]                                                                 ; data_out0        ;
; |gift2|Equal0~331                                                           ; |gift2|Equal0~331                                                           ; data_out0        ;
; |gift2|i[3]                                                                 ; |gift2|i[3]                                                                 ; data_out0        ;
; |gift2|i[2]                                                                 ; |gift2|i[2]                                                                 ; data_out0        ;
; |gift2|Equal0~332                                                           ; |gift2|Equal0~332                                                           ; data_out0        ;
; |gift2|Equal0~333                                                           ; |gift2|Equal0~333                                                           ; data_out0        ;
; |gift2|Equal1~50                                                            ; |gift2|Equal1~50                                                            ; data_out0        ;
; |gift2|c~1198                                                               ; |gift2|c~1198                                                               ; data_out0        ;
; |gift2|c~1199                                                               ; |gift2|c~1199                                                               ; data_out0        ;
; |gift2|Equal2~45                                                            ; |gift2|Equal2~45                                                            ; data_out0        ;
; |gift2|c~1200                                                               ; |gift2|c~1200                                                               ; data_out0        ;
; |gift2|c~1201                                                               ; |gift2|c~1201                                                               ; data_out0        ;
; |gift2|c~1202                                                               ; |gift2|c~1202                                                               ; data_out0        ;
; |gift2|Equal0~334                                                           ; |gift2|Equal0~334                                                           ; data_out0        ;
; |gift2|c~1204                                                               ; |gift2|c~1204                                                               ; data_out0        ;
; |gift2|c~1205                                                               ; |gift2|c~1205                                                               ; data_out0        ;
; |gift2|c~1207                                                               ; |gift2|c~1207                                                               ; data_out0        ;
; |gift2|c~1208                                                               ; |gift2|c~1208                                                               ; data_out0        ;
; |gift2|c~1210                                                               ; |gift2|c~1210                                                               ; data_out0        ;
; |gift2|c~1212                                                               ; |gift2|c~1212                                                               ; data_out0        ;
; |gift2|c~1214                                                               ; |gift2|c~1214                                                               ; data_out0        ;
; |gift2|c~1217                                                               ; |gift2|c~1217                                                               ; data_out0        ;
; |gift2|c~1219                                                               ; |gift2|c~1219                                                               ; data_out0        ;
; |gift2|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]  ; |gift2|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]  ; data_out0        ;
; |gift2|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]  ; |gift2|lpm_add_sub:Add1|addcore:adder|a_csnbuffer:result_node|cout[1]       ; cout             ;

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