keyboard.tan.rpt
来自「一些很好的FPGA设计实例」· RPT 代码 · 共 276 行 · 第 1/5 页
RPT
276 行
; N/A ; 40.00 MHz ( period = 25.000 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; CONTROL1:inst3|control:inst|DATA[12] ; clk1 ; clk1 ; None ; None ; 24.000 ns ;
; N/A ; 40.00 MHz ( period = 25.000 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[17] ; CONTROL1:inst3|control:inst|DATA[12] ; clk1 ; clk1 ; None ; None ; 24.000 ns ;
; N/A ; 40.00 MHz ( period = 25.000 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[4] ; CONTROL1:inst3|control:inst|DATA[3] ; clk1 ; clk1 ; None ; None ; 24.000 ns ;
; N/A ; 40.00 MHz ( period = 25.000 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[4] ; CONTROL1:inst3|control:inst|DATA[2] ; clk1 ; clk1 ; None ; None ; 24.000 ns ;
; N/A ; 40.00 MHz ( period = 25.000 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[8] ; CONTROL1:inst3|control:inst|DATA[1] ; clk1 ; clk1 ; None ; None ; 24.000 ns ;
; N/A ; 40.00 MHz ( period = 25.000 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[16] ; CONTROL1:inst3|control:inst|DATA[1] ; clk1 ; clk1 ; None ; None ; 24.000 ns ;
; N/A ; 40.00 MHz ( period = 25.000 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[8] ; CONTROL1:inst3|control:inst|DATA[0] ; clk1 ; clk1 ; None ; None ; 24.000 ns ;
; N/A ; 40.00 MHz ( period = 25.000 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[16] ; CONTROL1:inst3|control:inst|DATA[0] ; clk1 ; clk1 ; None ; None ; 24.000 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[8] ; CONTROL1:inst3|control:inst|DATA[20] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[16] ; CONTROL1:inst3|control:inst|DATA[20] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[20] ; CONTROL1:inst3|control:inst|DATA[17] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[20] ; CONTROL1:inst3|control:inst|DATA[16] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[12] ; CONTROL1:inst3|control:inst|DATA[15] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[25] ; CONTROL1:inst3|control:inst|DATA[14] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[24] ; CONTROL1:inst3|control:inst|DATA[14] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[12] ; CONTROL1:inst3|control:inst|DATA[13] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[12] ; CONTROL1:inst3|control:inst|DATA[12] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[4] ; CONTROL1:inst3|control:inst|DATA[7] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[4] ; CONTROL1:inst3|control:inst|DATA[6] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[4] ; CONTROL1:inst3|control:inst|DATA[5] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[4] ; CONTROL1:inst3|control:inst|DATA[4] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[6] ; CONTROL1:inst3|control:inst|DATA[3] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[5] ; CONTROL1:inst3|control:inst|DATA[3] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[6] ; CONTROL1:inst3|control:inst|DATA[2] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[5] ; CONTROL1:inst3|control:inst|DATA[2] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[10] ; CONTROL1:inst3|control:inst|DATA[1] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[9] ; CONTROL1:inst3|control:inst|DATA[1] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; CONTROL1:inst3|control:inst|DATA[1] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[17] ; CONTROL1:inst3|control:inst|DATA[1] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[10] ; CONTROL1:inst3|control:inst|DATA[0] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[9] ; CONTROL1:inst3|control:inst|DATA[0] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; CONTROL1:inst3|control:inst|DATA[0] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.16 MHz ( period = 24.900 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[17] ; CONTROL1:inst3|control:inst|DATA[0] ; clk1 ; clk1 ; None ; None ; 23.900 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[10] ; CONTROL1:inst3|control:inst|DATA[20] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[9] ; CONTROL1:inst3|control:inst|DATA[20] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[18] ; CONTROL1:inst3|control:inst|DATA[20] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[17] ; CONTROL1:inst3|control:inst|DATA[20] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[22] ; CONTROL1:inst3|control:inst|DATA[17] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[21] ; CONTROL1:inst3|control:inst|DATA[17] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[7] ; CONTROL1:inst3|control:inst|DATA[18] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[22] ; CONTROL1:inst3|control:inst|DATA[16] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[21] ; CONTROL1:inst3|control:inst|DATA[16] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[7] ; CONTROL1:inst3|control:inst|DATA[19] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[14] ; CONTROL1:inst3|control:inst|DATA[15] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[13] ; CONTROL1:inst3|control:inst|DATA[15] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[11] ; CONTROL1:inst3|control:inst|DATA[15] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[19] ; CONTROL1:inst3|control:inst|DATA[15] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[28] ; CONTROL1:inst3|control:inst|DATA[14] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[26] ; CONTROL1:inst3|control:inst|DATA[14] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[14] ; CONTROL1:inst3|control:inst|DATA[13] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ; CONTROL1:inst3|control:inst|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[13] ; CONTROL1:inst3|control:inst|DATA[13] ; clk1 ; clk1 ; None ; None ; 23.800 ns ;
; N/A ; 40.32 MHz ( period = 24.800 ns ) ⌨️ 快捷键说明
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