reg_latch.fit.summary
来自「一些很好的FPGA设计实例」· SUMMARY 代码 · 共 10 行
SUMMARY
10 行
Fitter Status : Successful - Fri Jan 26 16:30:34 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : reg_latch
Top-level Entity Name : reg_latch
Family : MAX7000AE
Device : EPM7032AELC44-4
Timing Models : Final
Total macrocells : 8 / 32 ( 25 % )
Total pins : 18 / 36 ( 50 % )
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