clkdiv.fit.summary

来自「一些很好的FPGA设计实例」· SUMMARY 代码 · 共 10 行

Fitter Status : Successful - Tue Sep 30 15:22:36 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : clkdiv
Top-level Entity Name : clkdiv
Family : MAX7000S
Device : EPM7064SLC84-10
Timing Models : Final
Total macrocells : 7 / 64 ( 11 % )
Total pins : 10 / 68 ( 15 % )