trafficlight.map.summary

来自「一些很好的FPGA设计实例」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Thu May 22 20:57:22 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : trafficlight
Top-level Entity Name : trafficlight
Family : Cyclone
Total logic elements : 160
Total pins : 19
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0