yimaqi.map.eqn

一些很好的FPGA设计实例

--A1L1 is reduce_nor~199
--operation mode is normal

A1L1 = !x[5] & !x[4] & !x[6] & !x[7];


--A1L52 is y~517
--operation mode is normal

A1L52 = !x[1] & !x[3] & !x[2] & !x[0];


--A1L51 is y~59
--operation mode is normal

A1L51 = x[7] & !x[6] & !x[5] & !x[4] # !x[7] & (x[6] & !x[5] & !x[4] # !x[6] & (x[5] $ x[4]));


--A1L62 is y~518
--operation mode is normal

A1L62 = x[1] & !x[3] & !x[2] & !x[0] # !x[1] & (x[3] & !x[2] & !x[0] # !x[3] & (x[2] $ x[0]));


--A1L72 is y~519
--operation mode is normal

A1L72 = A1L1 & (A1L62 # A1L52 & A1L51) # !A1L1 & A1L52 & A1L51;


--A1L71 is y~492
--operation mode is normal

A1L71 = x[0] & !x[1] & !x[5] & !x[4] # !x[0] & (x[1] & !x[5] & !x[4] # !x[1] & (x[5] $ x[4]));


--A1L61 is y~490
--operation mode is normal

A1L61 = A1L71 & !x[6];


--A1L81 is y~496
--operation mode is normal

A1L81 = x[7] # x[3] # x[2] # !A1L61;


--A1L02 is y~502
--operation mode is normal

A1L02 = x[2] & !x[0] & !x[4] & !x[6] # !x[2] & (x[0] & !x[4] & !x[6] # !x[0] & (x[4] $ x[6]));


--A1L91 is y~500
--operation mode is normal

A1L91 = A1L02 & !x[5];


--A1L12 is y~506
--operation mode is normal

A1L12 = x[7] # x[3] # x[1] # !A1L91;


--A1L32 is y~512
--operation mode is normal

A1L32 = x[2] & !x[0] & !x[1] & !x[3] # !x[2] & (x[0] & !x[1] & !x[3] # !x[0] & (x[1] $ x[3]));


--A1L22 is y~510
--operation mode is normal

A1L22 = A1L32 & !x[7];


--A1L42 is y~516
--operation mode is normal

A1L42 = x[6] # x[4] # x[5] # !A1L22;


--x[5] is x[5]
--operation mode is input

x[5] = INPUT();


--x[4] is x[4]
--operation mode is input

x[4] = INPUT();


--x[6] is x[6]
--operation mode is input

x[6] = INPUT();


--x[7] is x[7]
--operation mode is input

x[7] = INPUT();


--x[2] is x[2]
--operation mode is input

x[2] = INPUT();


--x[0] is x[0]
--operation mode is input

x[0] = INPUT();


--x[1] is x[1]
--operation mode is input

x[1] = INPUT();


--x[3] is x[3]
--operation mode is input

x[3] = INPUT();


--y[2] is y[2]
--operation mode is output

y[2]_tri_out = TRI(A1L42, A1L72);
y[2] = OUTPUT(y[2]_tri_out);


--y[1] is y[1]
--operation mode is output

y[1]_tri_out = TRI(A1L81, A1L72);
y[1] = OUTPUT(y[1]_tri_out);


--y[0] is y[0]
--operation mode is output

y[0]_tri_out = TRI(A1L12, A1L72);
y[0] = OUTPUT(y[0]_tri_out);