bijiaoqi.map.qmsg

一些很好的FPGA设计实例

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.1 Build 181 06/29/2004 SJ Full Version " "Info: Version 4.1 Build 181 06/29/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu May 17 14:40:02 2007 " "Info: Processing started: Thu May 17 14:40:02 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off bijiaoqi -c bijiaoqi " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off bijiaoqi -c bijiaoqi" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "bijiaoqi.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file bijiaoqi.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 bijiaoqi-bijiaoqi " "Info: Found design unit 1: bijiaoqi-bijiaoqi" {  } { { "d:/vhdl数字逻辑教程/典型电路设计分析/9.2有符号数比较器和无符号数比较器/bijiaoqi.vhd" "bijiaoqi-bijiaoqi" "" { Text "d:/vhdl数字逻辑教程/典型电路设计分析/9.2有符号数比较器和无符号数比较器/bijiaoqi.vhd" 12 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 bijiaoqi " "Info: Found entity 1: bijiaoqi" {  } { { "d:/vhdl数字逻辑教程/典型电路设计分析/9.2有符号数比较器和无符号数比较器/bijiaoqi.vhd" "bijiaoqi" "" { Text "d:/vhdl数字逻辑教程/典型电路设计分析/9.2有符号数比较器和无符号数比较器/bijiaoqi.vhd" 7 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "40 " "Info: Implemented 40 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "16 " "Info: Implemented 16 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "3 " "Info: Implemented 3 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "21 " "Info: Implemented 21 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu May 17 14:40:08 2007 " "Info: Processing ended: Thu May 17 14:40:08 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0}  } {  } 0}