yimaqi.hier_info

一些很好的FPGA设计实例

|yimaqi
ena => temp1~0.OUTPUTSELECT
ena => temp1~1.OUTPUTSELECT
ena => temp1~2.OUTPUTSELECT
ena => temp1~3.OUTPUTSELECT
ena => temp1~4.OUTPUTSELECT
ena => temp1~5.OUTPUTSELECT
ena => temp1~6.OUTPUTSELECT
ena => temp1~7.OUTPUTSELECT
sel[0] => Decoder~0.IN2
sel[1] => Decoder~0.IN1
sel[2] => Decoder~0.IN0
x[0] <= temp1~7.DB_MAX_OUTPUT_PORT_TYPE
x[1] <= temp1~6.DB_MAX_OUTPUT_PORT_TYPE
x[2] <= temp1~5.DB_MAX_OUTPUT_PORT_TYPE
x[3] <= temp1~4.DB_MAX_OUTPUT_PORT_TYPE
x[4] <= temp1~3.DB_MAX_OUTPUT_PORT_TYPE
x[5] <= temp1~2.DB_MAX_OUTPUT_PORT_TYPE
x[6] <= temp1~1.DB_MAX_OUTPUT_PORT_TYPE
x[7] <= temp1~0.DB_MAX_OUTPUT_PORT_TYPE