yimaqi.fit.eqn

一些很好的FPGA设计实例

--A1L6 is temp1~8 at LC_X5_Y1_N3
--operation mode is normal

A1L6 = !sel[2] # !ena # !sel[0] # !sel[1];


--A1L7 is temp1~9 at LC_X5_Y1_N8
--operation mode is normal

A1L7 = sel[0] # !sel[2] # !ena # !sel[1];


--A1L8 is temp1~10 at LC_X5_Y1_N7
--operation mode is normal

A1L8 = sel[1] # !sel[2] # !ena # !sel[0];


--A1L9 is temp1~11 at LC_X5_Y1_N9
--operation mode is normal

A1L9 = sel[1] # sel[0] # !sel[2] # !ena;


--A1L01 is temp1~12 at LC_X5_Y1_N2
--operation mode is normal

A1L01 = sel[2] # !ena # !sel[0] # !sel[1];


--A1L11 is temp1~13 at LC_X5_Y1_N4
--operation mode is normal

A1L11 = sel[0] # sel[2] # !ena # !sel[1];


--A1L21 is temp1~14 at LC_X5_Y1_N5
--operation mode is normal

A1L21 = sel[1] # sel[2] # !ena # !sel[0];


--A1L31 is temp1~15 at LC_X5_Y1_N6
--operation mode is normal

A1L31 = sel[1] # sel[0] # sel[2] # !ena;


--ena is ena at PIN_Y17
--operation mode is input

ena = INPUT();


--sel[0] is sel[0] at PIN_Y18
--operation mode is input

sel[0] = INPUT();


--sel[1] is sel[1] at PIN_AB17
--operation mode is input

sel[1] = INPUT();


--sel[2] is sel[2] at PIN_W17
--operation mode is input

sel[2] = INPUT();


--x[7] is x[7] at PIN_U17
--operation mode is output

x[7] = OUTPUT(A1L6);


--x[6] is x[6] at PIN_AA17
--operation mode is output

x[6] = OUTPUT(A1L7);


--x[5] is x[5] at PIN_V18
--operation mode is output

x[5] = OUTPUT(A1L8);


--x[4] is x[4] at PIN_Y16
--operation mode is output

x[4] = OUTPUT(A1L9);


--x[3] is x[3] at PIN_AB18
--operation mode is output

x[3] = OUTPUT(A1L01);


--x[2] is x[2] at PIN_AA19
--operation mode is output

x[2] = OUTPUT(A1L11);


--x[1] is x[1] at PIN_Y19
--operation mode is output

x[1] = OUTPUT(A1L21);


--x[0] is x[0] at PIN_T16
--operation mode is output

x[0] = OUTPUT(A1L31);