example.map.summary

来自「一些很好的FPGA设计实例」· SUMMARY 代码 · 共 12 行

Flow Status : Successful - Sat May 12 16:01:18 2007
Quartus II Version : 4.1 Build 181 06/29/2004 SJ Full Version
Revision Name : example
Top-level Entity Name : example
Family : Stratix
Total logic elements : 1
Total pins : 4
Total memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0