cufaqi.fit.eqn

一些很好的FPGA设计实例

--A1L4Q is q~reg0 at LC2_A17
--operation mode is normal

A1L4Q_lut_out = d;
A1L4Q = DFFEA(A1L4Q_lut_out, GLOBAL(clk), !GLOBAL(rst), , , , );


--d is d at PIN_89
--operation mode is input

d = INPUT();


--clk is clk at PIN_39
--operation mode is input

clk = INPUT();


--rst is rst at PIN_91
--operation mode is input

rst = INPUT();


--q is q at PIN_6
--operation mode is output

q = OUTPUT(A1L4Q);