jicunqi.map.eqn

一些很好的FPGA设计实例

--internal[0] is internal[0]
--operation mode is normal

internal[0]_lut_out = internal[1];
internal[0] = DFFEA(internal[0]_lut_out, clk, !rst, , , , );


--internal[1] is internal[1]
--operation mode is normal

internal[1]_lut_out = internal[2];
internal[1] = DFFEA(internal[1]_lut_out, clk, !rst, , , , );


--internal[2] is internal[2]
--operation mode is normal

internal[2]_lut_out = internal[3];
internal[2] = DFFEA(internal[2]_lut_out, clk, !rst, , , , );


--internal[3] is internal[3]
--operation mode is normal

internal[3]_lut_out = d;
internal[3] = DFFEA(internal[3]_lut_out, clk, !rst, , , , );


--clk is clk
--operation mode is input

clk = INPUT();


--rst is rst
--operation mode is input

rst = INPUT();


--d is d
--operation mode is input

d = INPUT();


--q is q
--operation mode is output

q = OUTPUT(internal[0]);