jishuqi.fit.summary

一些很好的FPGA设计实例

Flow Status : Successful - Thu May 17 12:26:17 2007
Quartus II Version : 4.1 Build 181 06/29/2004 SJ Full Version
Revision Name : jishuqi
Top-level Entity Name : jishuqi
Family : ACEX1K
Total logic elements : 4 / 576 ( < 1 % )
Total pins : 5 / 66 ( 7 % )
Total memory bits : 0 / 12,288 ( 0 % )
Total PLLs : 0 / 1 ( 0 % )
Device : EP1K10TC100-1
Timing Models : Production