led1.tan.summary

用FPGA cyclone控制AD9280

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 3.921 ns
From           : data1[7]
To             : data2[7]~reg0
From Clock     : 
To Clock       : mclk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 6.583 ns
From           : data2[1]~reg0
To             : data2[1]
From Clock     : mclk
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -3.186 ns
From           : data1[6]
To             : data2[6]~reg0
From Clock     : 
To Clock       : mclk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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