common_util.c

AT91RM9200-U-Boot at91rm9200u-boot移植源代码

	printf ("Out:   ");
	if (stdio_devices[stdout] == NULL) {
		printf ("No output devices available!\n");
	} else {
		printf ("%s\n", stdio_devices[stdout]->name);
	}

	printf ("Err:   ");
	if (stdio_devices[stderr] == NULL) {
		printf ("No error devices available!\n");
	} else {
		printf ("%s\n", stdio_devices[stderr]->name);
	}
}

/* ------------------------------------------------------------------------- */

	/* switches the cs0 and the cs1 to the locations.
	   When boot is TRUE, the the mapping is switched
	   to the boot configuration, If it is FALSE, the
	   flash will be switched in the boot area */

#undef SW_CS_DBG
#ifdef SW_CS_DBG
#define	SW_CS_PRINTF(fmt,args...)	printf (fmt ,##args)
#else
#define SW_CS_PRINTF(fmt,args...)
#endif

#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405)
int switch_cs(unsigned char boot)
{
	unsigned long pbcr;
	int mode;

	mode=get_boot_mode();
	mtdcr(ebccfga, pb0cr);
	pbcr = mfdcr (ebccfgd);
	if (mode & BOOT_MPS) {
		/* Boot width = 8 bit MPS Boot, set up MPS on CS0 */
		/* we need only to switch if boot from MPS */
		/* printf(" MPS boot mode detected. ");*/
		/* printf("cs0 cfg: %lx\n",pbcr); */
		if(boot) {
			/* switch to boot configuration */
			/* this is a 8bit boot, switch cs0 to flash location */
			SW_CS_PRINTF("switch to boot mode (MPS on High address\n");
			pbcr&=0x000FFFFF; /*mask base address of the cs0 */
			pbcr|=(FLASH_BASE0_PRELIM & 0xFFF00000);
			mtdcr(ebccfga, pb0cr);
			mtdcr(ebccfgd, pbcr);
			SW_CS_PRINTF("  new cs0 cfg: %lx\n",pbcr);
			mtdcr(ebccfga, pb1cr); /* get cs1 config reg (flash) */
			pbcr = mfdcr(ebccfgd);
			SW_CS_PRINTF(" old cs1 cfg: %lx\n",pbcr);
			pbcr&=0x000FFFFF; /*mask base address of the cs1 */
			pbcr|=(MULTI_PURPOSE_SOCKET_ADDR & 0xFFF00000);
			mtdcr(ebccfga, pb1cr);
			mtdcr(ebccfgd, pbcr);
			SW_CS_PRINTF("  new cs1 cfg: %lx, MPS is on High Address\n",pbcr);
		}
		else {
			/* map flash to boot area, */
			SW_CS_PRINTF("map Flash to boot area\n");
			pbcr&=0x000FFFFF; /*mask base address of the cs0 */
			pbcr|=(MULTI_PURPOSE_SOCKET_ADDR & 0xFFF00000);
			mtdcr(ebccfga, pb0cr);
			mtdcr(ebccfgd, pbcr);
			SW_CS_PRINTF("  new cs0 cfg: %lx\n",pbcr);
			mtdcr(ebccfga, pb1cr); /* get cs1 config reg (flash) */
			pbcr = mfdcr(ebccfgd);
			SW_CS_PRINTF("  cs1 cfg: %lx\n",pbcr);
			pbcr&=0x000FFFFF; /*mask base address of the cs1 */
			pbcr|=(FLASH_BASE0_PRELIM & 0xFFF00000);
			mtdcr(ebccfga, pb1cr);
			mtdcr(ebccfgd, pbcr);
			SW_CS_PRINTF("  new cs1 cfg: %lx Flash is on High Address\n",pbcr);
		}
		return 1;
	}
	else {
		SW_CS_PRINTF("Normal boot, no switching necessary\n");
		return 0;
	}

}

int get_boot_mode(void)
{
	unsigned long pbcr;
	int res = 0;
	pbcr = mfdcr (strap);
	if ((pbcr & PSR_ROM_WIDTH_MASK) == 0) 
		/* boot via MPS or MPS mapping */
		res = BOOT_MPS;
	if(pbcr & PSR_ROM_LOC) 
		/* boot via PCI.. */
		res |= BOOT_PCI;
	 return res;
}

/* Setup cs0 parameter finally.
   Map the flash high (in boot area)
   This code can only be executed from SDRAM (after relocation).
*/
void setup_cs_reloc(void)
{
	unsigned long pbcr;
	/* Since we are relocated, we can set-up the CS finaly
	 * but first of all, switch off PCI mapping (in case it was a PCI boot) */
	out32r(PMM0MA,0L);
	icache_enable (); /* we are relocated */
	/* for PCI Boot, we have to set-up the remaining CS correctly */
	pbcr = mfdcr (strap);
	if(pbcr & PSR_ROM_LOC) {
		/* boot via PCI.. */
		if ((pbcr & PSR_ROM_WIDTH_MASK) == 0) {
		/* Boot width = 8 bit MPS Boot, set up MPS on CS0 */
			#ifdef DEBUG
			printf("Mapping MPS to CS0 @ 0x%lx\n",(MPS_CR_B & 0xfff00000));
			#endif
			mtdcr (ebccfga, pb0ap);
			mtdcr (ebccfgd, MPS_AP);
			mtdcr (ebccfga, pb0cr);
			mtdcr (ebccfgd, MPS_CR_B);
		}
		else {
			/* Flash boot, set up the Flash on CS0 */
			#ifdef DEBUG
			printf("Mapping Flash to CS0 @ 0x%lx\n",(FLASH_CR_B & 0xfff00000));
			#endif
			mtdcr (ebccfga, pb0ap);
			mtdcr (ebccfgd, FLASH_AP);
			mtdcr (ebccfga, pb0cr);
			mtdcr (ebccfgd, FLASH_CR_B);
		}
	}
	switch_cs(0); /* map Flash High */
}


#elif defined(CONFIG_VCMA9)
int switch_cs(unsigned char boot)
{
    return 0;
}
#endif /* CONFIG_VCMA9 */

int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
 	ulong size,src,ld_addr;
	int result;
	backup_t back;
	src = MULTI_PURPOSE_SOCKET_ADDR;
	size = IMAGE_SIZE;

	if (strcmp(argv[1], "flash") == 0)
	{
#if (CONFIG_COMMANDS & CFG_CMD_FDC)
		if (strcmp(argv[2], "floppy") == 0) {
 			char *local_args[3];
			extern int do_fdcboot (cmd_tbl_t *, int, int, char *[]);
			printf ("\nupdating bootloader image from floppy\n");
			local_args[0] = argv[0];
	    		if(argc==4) {
				local_args[1] = argv[3];
				local_args[2] = NULL;
				ld_addr=simple_strtoul(argv[3], NULL, 16);
				result=do_fdcboot(cmdtp, 0, 2, local_args);
			}
			else {
				local_args[1] = NULL;
				ld_addr=CFG_LOAD_ADDR;
				result=do_fdcboot(cmdtp, 0, 1, local_args);
			}
			result=mpl_prg_image(ld_addr);
			return result;
		}
#endif /* (CONFIG_COMMANDS & CFG_CMD_FDC) */
		if (strcmp(argv[2], "mem") == 0) {
	    		if(argc==4) {
				ld_addr=simple_strtoul(argv[3], NULL, 16);
			}
			else {
				ld_addr=load_addr;
			}
			printf ("\nupdating bootloader image from memory at %lX\n",ld_addr);
			result=mpl_prg_image(ld_addr);
			return result;
		}
		if (strcmp(argv[2], "mps") == 0) {
			printf ("\nupdating bootloader image from MPS\n");
			result=mpl_prg(src,size);
			return result;
		}
	}
	if (strcmp(argv[1], "mem") == 0)
	{
		result=0;
		if(argc==3)
		{
			result = (int)simple_strtol(argv[2], NULL, 16);
	    }
	    src=(unsigned long)&result;
	    src-=CFG_MEMTEST_START;
	    src-=(100*1024); /* - 100k */
	    src&=0xfff00000;
	    size=0;
	    do {
	    	size++;
			printf("\n\nPass %ld\n",size);
			mem_test(CFG_MEMTEST_START,src,1);
			if(ctrlc())
				break;
			if(result>0)
				result--;

		}while(result);
		return 0;
	}
	if (strcmp(argv[1], "clearenvvalues") == 0)
	{
 		if (strcmp(argv[2], "yes") == 0)
		{
			clear_env_values();
			return 0;
		}
	}
	if (strcmp(argv[1], "getback") == 0) {
		get_backup_values(&back);
		back.signature[3]=0;
		back.serial_name[16]=0;
		back.eth_addr[20]=0;
		printf("GetBackUp: signature: %s\n",back.signature);
		printf("           serial#:   %s\n",back.serial_name);
		printf("           ethaddr:   %s\n",back.eth_addr);
		return 0;
	}
	if (strcmp(argv[1], "setback") == 0) {
		set_backup_values(1);
		return 0;
	}
	printf("Usage:\n%s\n", cmdtp->usage);
	return 1;
}


#if (CONFIG_COMMANDS & CFG_CMD_DOC)
extern void doc_probe(ulong physadr);
void doc_init (void)
{
  doc_probe(MULTI_PURPOSE_SOCKET_ADDR);
}
#endif


#ifdef CONFIG_VIDEO
/******************************************************
 * Routines to display the Board information
 * to the screen (since the VGA will be initialized as last,
 * we must resend the infos)
 */

#ifdef CONFIG_CONSOLE_EXTRA_INFO
extern GraphicDevice ctfb;

void video_get_info_str (int line_number, char *info)
{
	/* init video info strings for graphic console */
	DECLARE_GLOBAL_DATA_PTR;
	PPC405_SYS_INFO sys_info;
	char rev;
	int i,boot;
	unsigned long pvr;
	char buf[64];
	char tmp[16];
	char cpustr[16];
	unsigned char *s, *e, bc;
	switch (line_number)
	{
	case 2:
		/* CPU and board infos */
		pvr=get_pvr();
		get_sys_info (&sys_info);
		switch (pvr) {
			case PVR_405GP_RB: rev='B'; break;
			case PVR_405GP_RC: rev='C'; break;
			case PVR_405GP_RD: rev='D'; break;
			case PVR_405GP_RE: rev='E'; break;
			case PVR_405GPR_RB: rev='B'; break;
			default:           rev='?'; break;
		}
		if(pvr==PVR_405GPR_RB)
			sprintf(cpustr,"PPC405GPr %c",rev);
		else
			sprintf(cpustr,"PPC405GP %c",rev);
		/* Board info */
		i=0;
		s=getenv ("serial#");
#ifdef CONFIG_PIP405
		if (!s || strncmp (s, "PIP405", 6)) {
			sprintf(buf,"### No HW ID - assuming PIP405");
		}
#endif
#ifdef CONFIG_MIP405
		if (!s || strncmp (s, "MIP405", 6)) {
			sprintf(buf,"### No HW ID - assuming MIP405");
		}
#endif
		else {
			for (e = s; *e; ++e) {
				if (*e == ' ')
					break;
			}
			for (; s < e; ++s) {
				if (*s == '_') {
					++s;
					break;
				}
				buf[i++]=*s;
			}
			sprintf(&buf[i]," SN ");
			i+=4;
			for (; s < e; ++s) {
				buf[i++]=*s;
			}
			buf[i++]=0;
		}
		sprintf (info," %s %s %s MHz (%lu/%lu/%lu MHz)",
			buf, cpustr,
			strmhz (tmp, gd->cpu_clk), sys_info.freqPLB / 1000000,
			sys_info.freqPLB / sys_info.pllOpbDiv / 1000000,
			sys_info.freqPLB / sys_info.pllExtBusDiv / 1000000);
		return;
	case 3:
		/* Memory Info */
		boot = get_boot_mode();
		bc = in8 (CONFIG_PORT_ADDR);
		sprintf(info, " %luMB RAM, %luMB Flash Cfg 0x%02X %s %s",
			gd->bd->bi_memsize / 0x100000,
			gd->bd->bi_flashsize / 0x100000,
			bc,
			(boot & BOOT_MPS) ? "MPS boot" : "Flash boot",
			ctfb.modeIdent);
		return;
	case 1:
		sprintf	(buf, "%s",CONFIG_IDENT_STRING);
		sprintf (info, " %s", &buf[1]);
		return;
    }
    /* no more info lines */
    *info = 0;
    return;
}
#endif /* CONFIG_CONSOLE_EXTRA_INFO */

#endif /* CONFIG_VIDEO */