📄 au1200fb.c
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/* * BRIEF MODULE DESCRIPTION * Au1200 LCD Driver. * * Copyright 2004 AMD * Author: AMD * * Based on: * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device * Created 28 Dec 1997 by Geert Uytterhoeven * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */#include <linux/module.h>#include <linux/kernel.h>#include <linux/errno.h>#include <linux/string.h>#include <linux/mm.h>#include <linux/tty.h>#include <linux/slab.h>#include <linux/delay.h>#include <linux/fb.h>#include <linux/init.h>#include <asm/uaccess.h>#include <asm/au1000.h>#include <asm/au1xxx_gpio.h>#include "au1200fb.h"#include <video/fbcon.h>#include <video/fbcon-cfb16.h>#include <video/fbcon-cfb32.h>#define CMAPSIZE 16#ifdef CONFIG_MIPS_PB1200#include <asm/pb1200.h>#endif#ifdef CONFIG_MIPS_DB1200#include <asm/db1200.h>#endif#ifdef CONFIG_MIPS_FICMMP#include <asm/ficmmp.h>#endif#define AU1200_LCD_GET_WINENABLE 1#define AU1200_LCD_SET_WINENABLE 2#define AU1200_LCD_GET_WINLOCATION 3#define AU1200_LCD_SET_WINLOCATION 4#define AU1200_LCD_GET_WINSIZE 5#define AU1200_LCD_SET_WINSIZE 6#define AU1200_LCD_GET_BACKCOLOR 7#define AU1200_LCD_SET_BACKCOLOR 8#define AU1200_LCD_GET_COLORKEY 9#define AU1200_LCD_SET_COLORKEY 10#define AU1200_LCD_GET_PANEL 11#define AU1200_LCD_SET_PANEL 12typedef struct au1200_lcd_getset_t{ unsigned int subcmd; union { struct { int enable; } winenable; struct { int x, y; } winlocation; struct { int hsz, vsz; } winsize; struct { unsigned int color; } backcolor; struct { unsigned int key; unsigned int mask; } colorkey; struct { int panel; char desc[80]; } panel; };} au1200_lcd_getset_t;AU1200_LCD *lcd = (AU1200_LCD *)AU1200_LCD_ADDR;static int window_index = 0; /* default is zero */static int panel_index = 0; /* default is zero */struct window_settings{ unsigned char name[64]; uint32 mode_backcolor; uint32 mode_colorkey; uint32 mode_colorkeymsk; struct { int xres; int yres; int xpos; int ypos; uint32 mode_winctrl1; /* winctrl1[FRM,CCO,PO,PIPE] */ uint32 mode_winenable; } w[4];};struct panel_settings{ unsigned char name[64]; /* panel physical dimensions */ uint32 Xres; uint32 Yres; /* panel timings */ uint32 mode_screen; uint32 mode_horztiming; uint32 mode_verttiming; uint32 mode_clkcontrol; uint32 mode_pwmdiv; uint32 mode_pwmhi; uint32 mode_outmask; uint32 mode_fifoctrl; uint32 mode_toyclksrc; uint32 mode_backlight; uint32 mode_auxpll; int (*device_init)(void); int (*device_shutdown)(void);};#if defined(__BIG_ENDIAN)#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_00#else#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_01#endifstatic int panel_init (void);static int panel_shutdown (void);#if defined(CONFIG_FOCUS_ENHANCEMENTS)extern int focus_init_hdtv(void);extern int focus_init_component(void);extern int focus_init_cvsv(void);extern int focus_shutdown(void);#endif/* * Default window configurations */static struct window_settings windows[] ={ { /* Index 0 */ "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx", /* mode_backcolor */ 0x006600ff, /* mode_colorkey,msk*/ 0, 0, // FIX!!! { { /* xres, yres, xpos, ypos */ 0, 0, 0, 0, /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP, /* mode_winenable*/ LCD_WINENABLE_WEN0, }, { /* xres, yres, xpos, ypos */ 0, 0, 0, 0, /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP, /* mode_winenable*/ 0, }, { /* xres, yres, xpos, ypos */ 0, 0, 0, 0, /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE, /* mode_winenable*/ 0, }, { /* xres, yres, xpos, ypos */ 0, 0, 0, 0, /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE, /* mode_winenable*/ 0, }, }, }, { /* Index 1 */ "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx", /* mode_backcolor */ 0x006600ff, /* mode_colorkey,msk*/ 0, 0, // FIX!!! { { /* xres, yres, xpos, ypos */ 320, 240, 5, 5,#if 0 /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,#endif /* mode_winctrl1 */ LCD_WINCTRL1_FRM_24BPP|LCD_WINCTRL1_PO_00, /* mode_winenable*/ LCD_WINENABLE_WEN0, }, { /* xres, yres, xpos, ypos */ 0, 0, 0, 0, /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP, /* mode_winenable*/ 0, }, { /* xres, yres, xpos, ypos */ 100, 100, 0, 0, /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE, /* mode_winenable*/ 0/*LCD_WINENABLE_WEN2*/, }, { /* xres, yres, xpos, ypos */ 200, 25, 0, 0, /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE, /* mode_winenable*/ 0, }, }, }, /* Need VGA 640 @ 24bpp, @ 32bpp */ /* Need VGA 800 @ 24bpp, @ 32bpp */ /* Need VGA 1024 @ 24bpp, @ 32bpp */} ;/* * Controller configurations for various panels. */static struct panel_settings panels[] ={ { /* Index 0: QVGA 320x240 H:33.3kHz V:110Hz */ "VGA_320x240", 320, 240, /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240), /* mode_horztiming */ 0x00c4623b, /* mode_verttiming */ 0x00502814, /* mode_clkcontrol */ 0x00020002, /* /4=24Mhz */ /* mode_pwmdiv */ 0x00000000, /* mode_pwmhi */ 0x00000000, /* mode_outmask */ 0x00FFFFFF, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */ /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ NULL, /* device_shutdown */ NULL, }, { /* Index 1: VGA 640x480 H:30.3kHz V:58Hz */ "VGA_640x480", 640, 480, /* mode_screen */ 0x13f9df80, /* mode_horztiming */ 0x003c5859, /* mode_verttiming */ 0x00741201, /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */ /* mode_pwmdiv */ 0x00000000, /* mode_pwmhi */ 0x00000000, /* mode_outmask */ 0x00FFFFFF, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */ /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ NULL, /* device_shutdown */ NULL, }, { /* Index 2: SVGA 800x600 H:46.1kHz V:69Hz */ "SVGA_800x600", 800, 600, /* mode_screen */ 0x18fa5780, /* mode_horztiming */ 0x00dc7e77, /* mode_verttiming */ 0x00584805, /* mode_clkcontrol */ 0x00020000, /* /2=48Mhz */ /* mode_pwmdiv */ 0x00000000, /* mode_pwmhi */ 0x00000000, /* mode_outmask */ 0x00FFFFFF, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */ /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ NULL, /* device_shutdown */ NULL, }, { /* Index 3: XVGA 1024x768 H:56.2kHz V:70Hz */ "XVGA_1024x768", 1024, 768, /* mode_screen */ 0x1ffaff80, /* mode_horztiming */ 0x007d0e57, /* mode_verttiming */ 0x00740a01, /* mode_clkcontrol */ 0x000A0000, /* /1 */ /* mode_pwmdiv */ 0x00000000, /* mode_pwmhi */ 0x00000000, /* mode_outmask */ 0x00FFFFFF, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */ /* mode_backlight */ 0x00000000, /* mode_auxpll */ 6, /* 72MHz AUXPLL */ /* device_init */ NULL, /* device_shutdown */ NULL, }, { /* Index 4: XVGA 1280x1024 H:68.5kHz V:65Hz */ "XVGA_1280x1024", 1280, 1024, /* mode_screen */ 0x27fbff80, /* mode_horztiming */ 0x00cdb2c7, /* mode_verttiming */ 0x00600002, /* mode_clkcontrol */ 0x000A0000, /* /1 */ /* mode_pwmdiv */ 0x00000000, /* mode_pwmhi */ 0x00000000, /* mode_outmask */ 0x00FFFFFF, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */ /* mode_backlight */ 0x00000000, /* mode_auxpll */ 10, /* 120MHz AUXPLL */ /* device_init */ NULL, /* device_shutdown */ NULL, }, { /* Index 5: Samsung 1024x768 TFT */ "Samsung_1024x768_TFT", 1024, 768, /* mode_screen */ 0x1ffaff80, /* mode_horztiming */ 0x018cc677, /* mode_verttiming */ 0x00241217, /* mode_clkcontrol */ 0x00000000, //SCB 0x1 /* /4=24Mhz */ /* mode_pwmdiv */ 0x8000063f, //SCB 0x0 /* mode_pwmhi */ 0x03400000, //SCB 0x0 /* mode_outmask */ 0x00fcfcfc, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */ /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ panel_init, /* device_shutdown */ panel_shutdown, }, { /* Index 6: Toshiba 640x480 TFT */ "Toshiba_640x480_TFT", 640, 480, /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480), /* mode_horztiming */ LCD_HORZTIMING_HPW_N(96) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(51), /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(11) | LCD_VERTTIMING_VND2_N(32) , /* mode_clkcontrol */ 0x00000000, /* /4=24Mhz */ /* mode_pwmdiv */ 0x8000063f, /* mode_pwmhi */ 0x03400000, /* mode_outmask */ 0x00fcfcfc, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */ /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ panel_init, /* device_shutdown */ panel_shutdown, }, { /* Index 7: Sharp 320x240 TFT */ "Sharp_320x240_TFT", 320, 240, /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240), /* mode_horztiming */ LCD_HORZTIMING_HPW_N(60) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(2), /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(2) | LCD_VERTTIMING_VND2_N(5) , /* mode_clkcontrol */ LCD_CLKCONTROL_PCD_N(7), /* /16=6Mhz */ /* mode_pwmdiv */ 0x8000063f, /* mode_pwmhi */ 0x03400000, /* mode_outmask */ 0x00fcfcfc, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */ /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ panel_init, /* device_shutdown */ panel_shutdown, },#if defined(CONFIG_FOCUS_ENHANCEMENTS) { /* Index 8: Focus FS453 TV-Out 640x480 */ "FS453_640x480 (Composite/S-Video)", 640, 480, /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480), /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10), /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5), /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */ /* mode_pwmdiv */ 0x00000000, /* mode_pwmhi */ 0x00000000, /* mode_outmask */ 0x00FFFFFF, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000000, /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ focus_init_cvsv, /* device_shutdown */ focus_shutdown, }, { /* Index 9: Focus FS453 TV-Out 640x480 */ "FS453_640x480 (Component Video)", 640, 480, /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480), /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10), /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5), /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */ /* mode_pwmdiv */ 0x00000000, /* mode_pwmhi */ 0x00000000, /* mode_outmask */ 0x00FFFFFF, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000000, /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ focus_init_component, /* device_shutdown */ focus_shutdown, }, { /* Index 10: Focus FS453 TV-Out 640x480 */ "FS453_640x480 (HDTV)", 720, 480, /* mode_screen */ LCD_SCREEN_SX_N(720) | LCD_SCREEN_SY_N(480), /* mode_horztiming */ LCD_HORZTIMING_HND2_N(28) | LCD_HORZTIMING_HND1_N(46) | LCD_HORZTIMING_HPW_N(64), /* mode_verttiming */ LCD_VERTTIMING_VND2_N(7) | LCD_VERTTIMING_VND1_N(31) | LCD_VERTTIMING_VPW_N(7), /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */ /* mode_pwmdiv */ 0x00000000, /* mode_pwmhi */ 0x00000000, /* mode_outmask */ 0x00FFFFFF, /* mode_fifoctrl */ 0x2f2f2f2f, /* mode_toyclksrc */ 0x00000000, /* mode_backlight */ 0x00000000, /* mode_auxpll */ 8, /* 96MHz AUXPLL */ /* device_init */ focus_init_hdtv, /* device_shutdown */ focus_shutdown, },#endif};#define NUM_PANELS (sizeof(panels) / sizeof(struct panel_settings))static struct window_settings *win;static struct panel_settings *panel;struct au1200fb_info { struct fb_info_gen gen; unsigned long fb_virt_start; unsigned long fb_size; unsigned long fb_phys; int mmaped; int nohwcursor; int noblanking; struct { unsigned red, green, blue, pad; } palette[256];#if defined(FBCON_HAS_CFB16) u16 fbcon_cmap16[16];#endif#if defined(FBCON_HAS_CFB32) u32 fbcon_cmap32[16];#endif};struct au1200fb_par { struct fb_var_screeninfo var; int line_length; // in bytes int cmap_len; // color-map length};#ifndef CONFIG_FB_AU1200_DEVS#define CONFIG_FB_AU1200_DEVS 1#endifstatic struct au1200fb_info fb_infos[CONFIG_FB_AU1200_DEVS];static struct au1200fb_par fb_pars[CONFIG_FB_AU1200_DEVS];static struct display disps[CONFIG_FB_AU1200_DEVS];int au1200fb_init(void);void au1200fb_setup(char *options, int *ints);static int au1200fb_mmap(struct fb_info *fb, struct file *file, struct vm_area_struct *vma);static int au1200_blank(int blank_mode, struct fb_info_gen *info);static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd, u_long arg, int con, struct fb_info *info);void au1200_nocursor(struct display *p, int mode, int xx, int yy){};static int au1200_setlocation (int plane, int xpos, int ypos);static int au1200_setsize (int plane, int xres, int yres);static void au1200_setmode(int plane);static void au1200_setpanel (struct panel_settings *newpanel);static struct fb_ops au1200fb_ops = { owner: THIS_MODULE, fb_get_fix: fbgen_get_fix, fb_get_var: fbgen_get_var, fb_set_var: fbgen_set_var, fb_get_cmap: fbgen_get_cmap, fb_set_cmap: fbgen_set_cmap, fb_pan_display: fbgen_pan_display, fb_ioctl: au1200fb_ioctl, fb_mmap: au1200fb_mmap,};static int panel_init (void){#if defined(CONFIG_MIPS_PB1200) || defined(CONFIG_MIPS_DB1200) /* Apply power */ BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); //printk("panel_init(%s)\n", panel->name);#elif defined(CONFIG_MIPS_FICMMP) ficmmp_config_clear(FICMMP_CONFIG_LCMDATAOUT); //Enable data buffers ficmmp_config_set(FICMMP_CONFIG_LCMPWREN | FICMMP_CONFIG_LCMEN); //Take LCD out of reset#endif}static int panel_shutdown (void){#if defined(CONFIG_MIPS_PB1200) || defined(CONFIG_MIPS_DB1200) /* Remove power */ BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); //printk("panel_shutdown(%s)\n", panel->name);#elif defined(CONFIG_MIPS_FICMMP) ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT); //Disable data buffers ficmmp_config_clear(FICMMP_CONFIG_LCMEN | FICMMP_CONFIG_LCMPWREN); //Put LCD in reset, remove power#endif}static int
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