ch02.1b.htm

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  <TITLE> 2.9&nbsp;&nbsp;&nbsp;Summary</TITLE>

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<H2>2.9&nbsp;&nbsp;&nbsp;Summary</H2>



<P><P CLASS="BodyAfterHead"><A NAME="pgfId=147421"></A>The most important

concepts that we covered in this chapter are the following:</P>



<UL>

  <LI><A NAME="pgfId=147422"></A>The use of transistors as switches

  <LI><A NAME="pgfId=165752"></A>The difference between flip-flop and a latch

  <LI><A NAME="pgfId=147423"></A>The meaning of setup time and hold time

  <LI><A NAME="pgfId=165758"></A>Pipelines and latency

  <LI><A NAME="pgfId=165746"></A>The difference between datapath, standard-cell,

  and gate-array logic cells

  <LI><A NAME="pgfId=165739"></A>Strong and weak logic levels

  <LI><A NAME="pgfId=165730"></A>Pushing bubbles

  <LI><A NAME="pgfId=147424"></A>Ratio of logic

  <LI><A NAME="pgfId=147425"></A>Resistance per square of layers and their

  relative values in CMOS

  <LI><A NAME="pgfId=147426"></A>Design rules and <SPAN CLASS="Symbol"> l</SPAN>

</UL>



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