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<H1 CLASS="ChapterTitle">
<A NAME="pgfId=128322">
</A>
INTRODUCTION <BR>
TO ASICs</H1>
<P CLASS="BodyAfterHead">
<A NAME="pgfId=62606">
</A>
An <SPAN CLASS="Definition">
ASIC</SPAN>
(pronounced “a-sick”; bold typeface defines a new term) is an <SPAN CLASS="Definition">
application-specific integrated circuit</SPAN>
—at least that is what the acronym stands for. Before we answer the question of what <SPAN CLASS="Emphasis">
that</SPAN>
means we first look at the evolution of the silicon chip or <SPAN CLASS="Definition">
integrated circuit</SPAN>
(<SPAN CLASS="Definition">
IC</SPAN>
).</P>
<P CLASS="Body">
<A NAME="pgfId=16070">
</A>
Figure 1.1(a) shows an IC package (this is a pin-grid array, or PGA, shown upside down; the pins will go through holes in a printed-circuit board). People often call the package a chip, but, as you can see in Figure 1.1(b), the silicon chip itself (more properly called a <SPAN CLASS="Definition">
die</SPAN>
) is mounted in the cavity under the sealed lid. A PGA package is usually made from a ceramic material, but plastic packages are also common. </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableFigTitleSide">
<A NAME="pgfId=16103">
</A>
FIGURE 1.1 An integrated circuit (IC). (a) A pin-grid array (PGA) package. (b) The silicon die or chip is under the package lid.</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableFigure">
<A NAME="pgfId=16108">
</A>
</P>
<DIV>
<IMG SRC="CH01-1.gif">
</DIV>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=1247">
</A>
The physical size of a silicon die varies from a few millimeters on a side to over 1 inch on a side, but instead we often measure the size of an IC by the number of logic gates or the number of transistors that the IC contains. As a unit of measure a <SPAN CLASS="Definition">
gate equivalent </SPAN>
corresponds to a two-input NAND gate (a circuit that performs the logic function, <SPAN CLASS="EquationVariables">
F =</SPAN>
<SPAN CLASS="OverlineVariables">
A • B</SPAN>
). Often we just use the term <SPAN CLASS="Emphasis">
gates</SPAN>
instead of gate equivalents when we are measuring chip size—not to be confused with the gate terminal of a transistor. For example, a 100 k-gate IC contains the equivalent of 100,000 two-input NAND gates.</P>
<P CLASS="Body">
<A NAME="pgfId=16866">
</A>
The semiconductor industry has evolved from the first ICs of the early 1970s and matured rapidly since then. Early <SPAN CLASS="Definition">
small-scale integration</SPAN>
(<SPAN CLASS="Definition">
SSI</SPAN>
) ICs contained a few (1 to 10) logic gates—NAND gates, NOR gates, and so on—amounting to a few tens of transistors. The era of <SPAN CLASS="Definition">
medium-scale integration</SPAN>
(<SPAN CLASS="Definition">
MSI</SPAN>
) increased the range of integrated logic available to counters and similar, larger scale, logic functions. The era of <SPAN CLASS="Definition">
large-scale integration</SPAN>
(<SPAN CLASS="Definition">
LSI</SPAN>
) packed even larger logic functions, such as the first microprocessors, into a single chip. The era of <SPAN CLASS="Definition">
very large-scale integration</SPAN>
(<SPAN CLASS="Definition">
VLSI</SPAN>
) now offers 64-bit microprocessors, complete with cache memory and floating-point arithmetic units—well over a million transistors—on a single piece of silicon. As CMOS process technology improves, transistors continue to get smaller and ICs hold more and more transistors. Some people (especially in Japan) use the term <SPAN CLASS="Definition">
ultralarge scale integration</SPAN>
(<SPAN CLASS="Definition">
ULSI</SPAN>
), but most people stop at the term VLSI; otherwise we have to start inventing new words.</P>
<P CLASS="Body">
<A NAME="pgfId=22674">
</A>
The earliest ICs used <SPAN CLASS="Definition">
bipolar technology</SPAN>
and the majority of logic ICs used either <SPAN CLASS="Definition">
transistor–transistor logic</SPAN>
(<SPAN CLASS="Definition">
TTL</SPAN>
) or emitter-coupled logic (ECL). Although invented before the bipolar transistor, the <SPAN CLASS="Definition">
metal-oxide-silicon</SPAN>
(<SPAN CLASS="Definition">
MOS</SPAN>
) transistor was initially difficult to manufacture because of problems with the oxide interface. As these problems were gradually solved, metal-gate <SPAN CLASS="EmphasisPrefix">
n</SPAN>
-channel MOS (<SPAN CLASS="Definition">
nMOS</SPAN>
or <SPAN CLASS="Definition">
NMOS</SPAN>
) technology developed in the 1970s. At that time MOS technology required fewer masking steps, was denser, and consumed less power than equivalent bipolar ICs. This meant that, for a given performance, an MOS IC was cheaper than a bipolar IC and led to investment and growth of the MOS IC market. </P>
<P CLASS="Body">
<A NAME="pgfId=36516">
</A>
By the early 1980s the aluminum gates of the transistors were replaced by polysilicon gates, but the name MOS remained. The introduction of polysilicon as a gate material was a major improvement in CMOS technology, making it easier to make two types of transistors, <SPAN CLASS="EmphasisPrefix">
n</SPAN>
-channel MOS and <SPAN CLASS="EmphasisPrefix">
p</SPAN>
-channel MOS transistors, on the same IC—a <SPAN CLASS="Definition">
complementary MOS</SPAN>
(<SPAN CLASS="Definition">
CMOS</SPAN>
, never cMOS) technology. The principal advantage of CMOS over NMOS is lower power consumption. Another advantage of a polysilicon gate was a simplification of the fabrication process, allowing devices to be scaled down in size.</P>
<P CLASS="Body">
<A NAME="pgfId=90427">
</A>
There are four CMOS transistors in a two-input NAND gate (and a two-input NOR gate too), so to convert between gates and transistors, you multiply the number of gates by 4 to obtain the number of transistors. We can also measure an IC by the smallest <SPAN CLASS="Definition">
feature size</SPAN>
(roughly half the length of the smallest transistor) imprinted on the IC. Transistor dimensions are measured in microns (a micron, 1 <SPAN CLASS="Symbol">
m</SPAN>
m, is a millionth of a meter). Thus we talk about a 0.5 <SPAN CLASS="Symbol">
m</SPAN>
m IC or say an IC is built in (or with) a 0.5 <SPAN CLASS="Symbol">
m</SPAN>
m process, meaning that the smallest transistors are 0.5 <SPAN CLASS="Symbol">
m</SPAN>
m in length. We give a special label, <SPAN CLASS="Symbol">
l</SPAN>
or <SPAN CLASS="Definition">
lambda</SPAN>
, to this smallest feature size. Since lambda is equal to half of the smallest transistor length, <SPAN CLASS="Symbol">
l</SPAN>
<SPAN CLASS="Symbol">
ª</SPAN>
0.25 <SPAN CLASS="Symbol">
m</SPAN>
m in a 0.5 <SPAN CLASS="Symbol">
m</SPAN>
m process. Many of the drawings in this book use a scale marked with lambda for the same reason we place a scale on a map.</P>
<P CLASS="Body">
<A NAME="pgfId=36521">
</A>
A modern submicron CMOS process is now just as complicated as a submicron bipolar or BiCMOS (a combination of bipolar and CMOS) process. However, CMOS ICs have established a dominant position, are manufactured in much greater volume than any other technology, and therefore, because of the economy of scale, the cost of CMOS ICs is less than a bipolar or BiCMOS IC for the same function. Bipolar and BiCMOS ICs are still used for special needs. For example, bipolar technology is generally capable of handling higher voltages than CMOS. This makes bipolar and BiCMOS ICs useful in power electronics, cars, telephone circuits, and so on.</P>
<P CLASS="Body">
<A NAME="pgfId=1255">
</A>
Some digital logic ICs and their analog counterparts (analog/digital converters, for example) are <SPAN CLASS="Definition">
standard parts</SPAN>
, or standard ICs. You can select standard ICs from catalogs and data books and buy them from distributors. Systems manufacturers and designers can use the same standard part in a variety of different <SPAN CLASS="Definition">
microelectronic systems</SPAN>
(systems that use microelectronics or ICs).</P>
<P CLASS="Body">
<A NAME="pgfId=16917">
</A>
With the advent of VLSI in the 1980s engineers began to realize the advantages of designing an IC that was customized or tailored to a particular system or application rather than using standard ICs alone. Microelectronic system design then becomes a matter of defining the functions that you can implement using standard ICs and then implementing the remaining logic functions (sometimes called <SPAN CLASS="Definition">
glue logic</SPAN>
) with one or more <SPAN CLASS="Definition">
custom ICs</SPAN>
. As VLSI became possible you could build a system from a smaller number of components by combining many standard ICs into a few custom ICs. Building a microelectronic system with fewer ICs allows you to reduce cost and improve reliability.</P>
<P CLASS="Body">
<A NAME="pgfId=16911">
</A>
Of course, there are many situations in which it is not appropriate to use a custom IC for each and every part of an microelectronic system. If you need a large amount of memory, for example, it is still best to use standard memory ICs, either <SPAN CLASS="Definition">
dynamic random-access memory</SPAN>
(<SPAN CLASS="Definition">
DRAM</SPAN>
or dRAM), or <SPAN CLASS="Definition">
static RAM</SPAN>
(<SPAN CLASS="Definition">
SRAM</SPAN>
or sRAM), in conjunction with custom ICs. </P>
<P CLASS="Body">
<A NAME="pgfId=1277">
</A>
One of the first conferences to be devoted to this rapidly emerging segment of the IC industry was the <SPAN CLASS="Emphasis">
IEEE Custom Integrated Circuits Conference</SPAN>
(CICC), and the proceedings of this annual conference form a useful reference to the development of custom ICs. As different types of custom ICs began to evolve for different types of applications, these new ICs gave rise to a new term: application-specific IC, or ASIC. Now we have the <SPAN CLASS="Emphasis">
IEEE International ASIC Conference</SPAN>
, which tracks advances in ASICs separately from other types of custom ICs. Although the exact definition of an ASIC is difficult, we shall look at some examples to help clarify what people in the IC industry understand by the term. </P>
<P CLASS="Body">
<A NAME="pgfId=48008">
</A>
Examples of ICs that are <SPAN CLASS="Emphasis">
not</SPAN>
ASICs include standard parts such as: memory chips sold as a commodity item—ROMs, DRAM, and SRAM; microprocessors; TTL or TTL-equivalent ICs at SSI, MSI, and LSI levels.</P>
<P CLASS="Body">
<A NAME="pgfId=1299">
</A>
Examples of ICs that <SPAN CLASS="Emphasis">
are</SPAN>
ASICs include: a chip for a toy bear that talks; a chip for a satellite; a chip designed to handle the interface between memory and a microprocessor for a workstation CPU; and a chip containing a microprocessor as a cell together with other logic.</P>
<P CLASS="Body">
<A NAME="pgfId=1309">
</A>
As a general rule, if you can find it in a data book, then it is probably not an ASIC, but there are some exceptions. For example, two ICs that might or might not be considered ASICs are a controller chip for a PC and a chip for a modem. Both of these examples are specific to an application (shades of an ASIC) but are sold to many different system vendors (shades of a standard part). ASICs such as these are sometimes called <SPAN CLASS="Definition">
application-specific standard products</SPAN>
(<SPAN CLASS="Definition">
ASSPs</SPAN>
).</P>
<P CLASS="Body">
<A NAME="pgfId=27191">
</A>
Trying to decide which members of the huge IC family are application-specific is tricky—after all, every IC has an application. For example, people do not usually consider an application-specific microprocessor to be an ASIC. I shall describe how to design an ASIC that may include large cells such as microprocessors, but I shall not describe the design of the microprocessors themselves. Defining an ASIC by looking at the application can be confusing, so we shall look at a different way to categorize the IC family. The easiest way to recognize people is by their faces and physical characteristics: tall, short, thin. The easiest characteristics of ASICs to understand are physical ones too, and we shall look at these next. It is important to understand these differences because they affect such factors as the price of an ASIC and the way you design an ASIC.</P>
</DIV>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.1.htm#pgfId=1331" CLASS="Hypertext">
1.1 Types of ASICs</A>
</H1>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.2.htm#pgfId=25111" CLASS="Hypertext">
1.2 Design Flow</A>
</H1>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.3.htm#pgfId=21209" CLASS="Hypertext">
1.3 Case Study</A>
</H1>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.4.htm#pgfId=44056" CLASS="Hypertext">
1.4 Economics of ASICs</A>
</H1>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.5.htm#pgfId=36708" CLASS="Hypertext">
1.5 ASIC Cell Libraries</A>
</H1>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.6.htm#pgfId=2301" CLASS="Hypertext">
1.6 Summary</A>
</H1>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.7.htm#pgfId=44193" CLASS="Hypertext">
1.7 Problems</A>
</H1>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.8.htm#pgfId=56392" CLASS="Hypertext">
1.8 Bibliography</A>
</H1>
<H1 CLASS="Heading1TOC">
<A HREF="CH01.9.htm#pgfId=56384" CLASS="Hypertext">
1.9 References</A>
</H1>
<HR><P>[ <A A HREF="../../ASICs.htm#anchor749424">Chapter Index</A> ] [ <A HREF="CH01.1.htm">Next page</A> ]</P></BODY>
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