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<TITLE> 7.10&nbsp;References</TITLE></HEAD><!--#include file="top.html"--><!--#include file="header.html"-->



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7.10&nbsp;<A NAME="17520">

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References</H1>

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Brown, S. D., et al. 1992. <SPAN CLASS="Emphasis">

Field-Programmable Gate Arrays.</SPAN>

 Norwell, MA: Kluwer Academic, 206 p. ISBN 0-7923-9248-5. TK7872.L64F54. Contents: Introduction to FPGAs, Commercially Available FPGAs, Technology Mapping for FPGAs, Logic Block Architecture, Routing for FPGAs, Flexibility of FPGA Routing Resources, A Theoretical Model for FPGA Routing. Includes an introduction to commercially available FPGAs. The rest of the book covers research on logic synthesis for FPGAs and FPGA architectures, concentrating on LUT-based architectures. </P>

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Greene, J., et al. 1993. &#8220;Antifuse field programmable gate arrays.&#8221; <SPAN CLASS="Emphasis">

Proceedings of the IEEE, </SPAN>

vol. 81, no. 7, pp. 1042&#8211;1056, 1993. Review article describing the Actel FPGAs. (Included in the Actel 1994 data book.)</P>

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Rubenstein, J., P. Penfield, and M. A. Horowitz. 1983. &#8220;Signal delay in RC tree networks.&#8221; <SPAN CLASS="Emphasis">

IEEE Transactions on CAD, </SPAN>

vol. CAD-2, no.&nbsp;3, July 1983, pp. &nbsp;202&#8211;211. Derives bounds for the response of RC networks excited by an input step voltage. </P>

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