📄 ch17.4.htm
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<P CLASS="TableFigureTitle">
<A NAME="pgfId=17273">
</A>
FIGURE 17.22 <A NAME="23689">
</A>
The regular and reduced standard parasitic format (SPF) models for interconnect. (a) An example of an interconnect network with fanout. The driving-point admittance of the interconnect network is <SPAN CLASS="EquationVariables">
Y</SPAN>
(<SPAN CLASS="EquationVariables">
s</SPAN>
). (b) The SPF model of the interconnect. (c) The lumped-capacitance interconnect model. (d) The lumped-RC interconnect model. (e) The PI segment interconnect model (notice the capacitor nearest the output node is labeled <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="Subscript">
2</SUB>
rather than <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="Subscript">
1</SUB>
). The values of <SPAN CLASS="EquationVariables">
C</SPAN>
, <SPAN CLASS="EquationVariables">
R</SPAN>
, <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="Subscript">
1</SUB>
, and <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="Subscript">
2</SUB>
are calculated so that <SPAN CLASS="EquationVariables">
Y</SPAN>
<SUB CLASS="Subscript">
1</SUB>
(<SPAN CLASS="EquationVariables">
s</SPAN>
), <SPAN CLASS="EquationVariables">
Y</SPAN>
<SUB CLASS="Subscript">
2</SUB>
(<SPAN CLASS="EquationVariables">
s</SPAN>
), and <SPAN CLASS="EquationVariables">
Y</SPAN>
<SUB CLASS="Subscript">
3</SUB>
(<SPAN CLASS="EquationVariables">
s</SPAN>
) are the first-, second-, and third-order Taylor-series approximations to <SPAN CLASS="EquationVariables">
Y</SPAN>
(<SPAN CLASS="EquationVariables">
s</SPAN>
). </P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=42933">
</A>
The key features of regular and reduced SPF are as follows:</P>
<UL>
<LI CLASS="BulletFirst">
<A NAME="pgfId=17274">
</A>
The loading effect of a net as seen by the driving gate is represented by choosing one of three different RC networks: lumped-C, lumped-RC, or PI segment (selected when generating the SPF) [<A NAME="O誃rien89a">
</A>
O’Brien and Savarino, 1989].</LI>
<LI CLASS="BulletLast">
<A NAME="pgfId=17275">
</A>
The pin-to-pin delays of each path in the net are modeled by a simple RC delay (one for each path). This can be the Elmore constant for each path (see <A HREF="CH17.1.htm#30196" CLASS="XRef">
Section 17.1.2</A>
), but it need not be.</LI>
</UL>
<P CLASS="Body">
<A NAME="pgfId=17277">
</A>
Here is an example regular SPF file for just one net that uses the PI segment model shown in <A HREF="CH17.4.htm#23689" CLASS="XRef">
Figure 17.22</A>
(e):</P>
<P CLASS="ComputerFirst">
<A NAME="pgfId=17281">
</A>
#Design Name : EXAMPLE1</P>
<P CLASS="Computer">
<A NAME="pgfId=17282">
</A>
#Date : 6 August 1995</P>
<P CLASS="Computer">
<A NAME="pgfId=17283">
</A>
#Time : 12:00:00</P>
<P CLASS="Computer">
<A NAME="pgfId=17284">
</A>
#Resistance Units : 1 ohms</P>
<P CLASS="Computer">
<A NAME="pgfId=17285">
</A>
#Capacitance Units : 1 pico farads</P>
<P CLASS="Computer">
<A NAME="pgfId=17286">
</A>
#Syntax :</P>
<P CLASS="Computer">
<A NAME="pgfId=17287">
</A>
#N <netName></P>
<P CLASS="Computer">
<A NAME="pgfId=17288">
</A>
#C <capVal></P>
<P CLASS="Computer">
<A NAME="pgfId=17289">
</A>
# F <from CompName> <fromPinName></P>
<P CLASS="Computer">
<A NAME="pgfId=17290">
</A>
# GC <conductance></P>
<P CLASS="Computer">
<A NAME="pgfId=17291">
</A>
# |</P>
<P CLASS="Computer">
<A NAME="pgfId=17292">
</A>
# REQ <res></P>
<P CLASS="Computer">
<A NAME="pgfId=17293">
</A>
# GRC <conductance></P>
<P CLASS="Computer">
<A NAME="pgfId=17294">
</A>
# T <toCompName> <toPinName> RC <rcConstant> A <value></P>
<P CLASS="Computer">
<A NAME="pgfId=17295">
</A>
# |</P>
<P CLASS="Computer">
<A NAME="pgfId=17296">
</A>
# RPI <res></P>
<P CLASS="Computer">
<A NAME="pgfId=17297">
</A>
# C1 <cap></P>
<P CLASS="Computer">
<A NAME="pgfId=17298">
</A>
# C2 <cap></P>
<P CLASS="Computer">
<A NAME="pgfId=17299">
</A>
# GPI <conductance></P>
<P CLASS="Computer">
<A NAME="pgfId=17300">
</A>
# T <toCompName> <toPinName> RC <rcConstant> A <value></P>
<P CLASS="Computer">
<A NAME="pgfId=17301">
</A>
# TIMING.ADMITTANCE.MODEL = PI</P>
<P CLASS="Computer">
<A NAME="pgfId=17302">
</A>
# TIMING.CAPACITANCE.MODEL = PP</P>
<P CLASS="Computer">
<A NAME="pgfId=17303">
</A>
N CLOCK</P>
<P CLASS="Computer">
<A NAME="pgfId=17304">
</A>
C 3.66</P>
<P CLASS="Computer">
<A NAME="pgfId=17305">
</A>
F ROOT Z</P>
<P CLASS="Computer">
<A NAME="pgfId=17306">
</A>
RPI 8.85</P>
<P CLASS="Computer">
<A NAME="pgfId=17307">
</A>
C1 2.49</P>
<P CLASS="Computer">
<A NAME="pgfId=17308">
</A>
C2 1.17</P>
<P CLASS="Computer">
<A NAME="pgfId=17309">
</A>
GPI = 0.0</P>
<P CLASS="Computer">
<A NAME="pgfId=17310">
</A>
T DF1 G RC 22.20</P>
<P CLASS="ComputerLast">
<A NAME="pgfId=17311">
</A>
T DF2 G RC 13.05</P>
<P CLASS="BodyAfterHead">
<A NAME="pgfId=17312">
</A>
This file describes the following:</P>
<UL>
<LI CLASS="BulletFirst">
<A NAME="pgfId=17313">
</A>
The preamble contains the file format.</LI>
<LI CLASS="BulletList">
<A NAME="pgfId=17314">
</A>
This representation uses the PI segment model (<A HREF="CH17.4.htm#23689" CLASS="XRef">
Figure 17.22</A>
e).</LI>
<LI CLASS="BulletList">
<A NAME="pgfId=17318">
</A>
This net uses pin-to-pin timing.</LI>
<LI CLASS="BulletList">
<A NAME="pgfId=17319">
</A>
The driving gate of this net is <SPAN CLASS="BodyComputer">
ROOT</SPAN>
and the output pin name is <SPAN CLASS="BodyComputer">
Z</SPAN>
.</LI>
<LI CLASS="BulletList">
<A NAME="pgfId=17320">
</A>
The PI segment elements have values: <SPAN CLASS="BodyComputer">
C1</SPAN>
= 2.49 pF, <SPAN CLASS="BodyComputer">
C2</SPAN>
= 1.17 pF, <SPAN CLASS="BodyComputer">
RPI</SPAN>
= 8.85 <SPAN CLASS="Symbol">
W</SPAN>
. Notice the order of <SPAN CLASS="BodyComputer">
C1</SPAN>
and <SPAN CLASS="BodyComputer">
C2</SPAN>
in <A HREF="CH17.4.htm#23689" CLASS="XRef">
Figure 17.22</A>
(e). The element GPI is not normally used in SPF files.</LI>
<LI CLASS="BulletList">
<A NAME="pgfId=24844">
</A>
The delay from output pin <SPAN CLASS="BodyComputer">
Z</SPAN>
of <SPAN CLASS="BodyComputer">
ROOT</SPAN>
to input pin <SPAN CLASS="BodyComputer">
G</SPAN>
of <SPAN CLASS="BodyComputer">
DF1</SPAN>
is 22.20 ns.</LI>
<LI CLASS="BulletLast">
<A NAME="pgfId=17322">
</A>
The delay from pin <SPAN CLASS="BodyComputer">
Z</SPAN>
of <SPAN CLASS="BodyComputer">
ROOT</SPAN>
to pin <SPAN CLASS="BodyComputer">
G</SPAN>
of <SPAN CLASS="BodyComputer">
DF2</SPAN>
is 13.05 ns.</LI>
</UL>
<P CLASS="Body">
<A NAME="pgfId=17325">
</A>
The <SPAN CLASS="Definition">
reduced SPF</SPAN>
<A NAME="marker=17323">
</A>
(<A NAME="marker=17324">
</A>
<A NAME="marker=39136">
</A>
RSPF) contains the same information as regular SPF, but uses the SPICE format. Here is an example RSPF file that corresponds to the previous regular SPF example:</P>
<P CLASS="ComputerFirst">
<A NAME="pgfId=17326">
</A>
* Design Name : EXAMPLE1</P>
<P CLASS="Computer">
<A NAME="pgfId=17327">
</A>
* Date : 6 August 1995</P>
<P CLASS="Computer">
<A NAME="pgfId=17328">
</A>
* Time : 12:00:00</P>
<P CLASS="Computer">
<A NAME="pgfId=17329">
</A>
* Resistance Units : 1 ohms</P>
<P CLASS="Computer">
<A NAME="pgfId=17330">
</A>
* Capacitance Units : 1 pico farads</P>
<P CLASS="Computer">
<A NAME="pgfId=17331">
</A>
*| RSPF 1.0</P>
<P CLASS="Computer">
<A NAME="pgfId=17332">
</A>
*| DELIMITER "_"</P>
<P CLASS="Computer">
<A NAME="pgfId=17333">
</A>
.SUBCKT EXAMPLE1 OUT IN</P>
<P CLASS="Computer">
<A NAME="pgfId=17334">
</A>
*| GROUND_NET VSS</P>
<P CLASS="Computer">
<A NAME="pgfId=17335">
</A>
* TIMING.CAPACITANCE.MODEL = PP</P>
<P CLASS="Computer">
<A NAME="pgfId=17336">
</A>
*|NET CLOCK 3.66PF</P>
<P CLASS="Computer">
<A NAME="pgfId=17337">
</A>
*|DRIVER ROOT_Z ROOT Z</P>
<P CLASS="Computer">
<A NAME="pgfId=17338">
</A>
*|S (ROOT_Z_OUTP1 0.0 0.0)</P>
<P CLASS="Computer">
<A NAME="pgfId=17339">
</A>
R2 ROOT_Z ROOT_Z_OUTP1 8.85</P>
<P CLASS="Computer">
<A NAME="pgfId=17340">
</A>
C1 ROOT_Z_OUTP1 VSS 2.49PF</P>
<P CLASS="Computer">
<A NAME="pgfId=17341">
</A>
C2 ROOT_Z VSS 1.17PF</P>
<P CLASS="Computer">
<A NAME="pgfId=17342">
</A>
*|LOAD DF2_G DF1 G</P>
<P CLASS="Computer">
<A NAME="pgfId=17343">
</A>
*|S (DF1_G_INP1 0.0 0.0)</P>
<P CLASS="Computer">
<A NAME="pgfId=17344">
</A>
E1 DF1_G_INP1 VSS ROOT_Z VSS 1.0</P>
<P CLASS="Computer">
<A NAME="pgfId=17345">
</A>
R3 DF1_G_INP1 DF1_G 22.20</P>
<P CLASS="Computer">
<A NAME="pgfId=17346">
</A>
C3 DF1_G VSS 1.0PF</P>
<P CLASS="Computer">
<A NAME="pgfId=17347">
</A>
*|LOAD DF2_G DF2 G</P>
<P CLASS="Computer">
<A NAME="pgfId=17348">
</A>
*|S (DF2_G_INP1 0.0 0.0)</P>
<P CLASS="Computer">
<A NAME="pgfId=17349">
</A>
E2 DF2_G_INP1 VSS ROOT_Z VSS 1.0</P>
<P CLASS="Computer">
<A NAME="pgfId=17350">
</A>
R4 DF2_G_INP1 DF2_G 13.05</P>
<P CLASS="Computer">
<A NAME="pgfId=17351">
</A>
C4 DF2_G VSS 1.0PF</P>
<P CLASS="Computer">
<A NAME="pgfId=17352">
</A>
*Instance Section</P>
<P CLASS="Computer">
<A NAME="pgfId=17353">
</A>
XDF1 DF1_Q DF1_QN DF1_D DF1_G DF1_CD DF1_VDD DF1_VSS DFF3</P>
<P CLASS="Computer">
<A NAME="pgfId=17354">
</A>
XDF2 DF2_Q DF2_QN DF2_D DF2_G DF2_CD DF2_VDD DF2_VSS DFF3</P>
<P CLASS="Computer">
<A NAME="pgfId=17355">
</A>
XROOT ROOT_Z ROOT_A ROOT_VDD ROOT_VSS BUF</P>
<P CLASS="Computer">
<A NAME="pgfId=17356">
</A>
.ENDS</P>
<P CLASS="ComputerLast">
<A NAME="pgfId=17357">
</A>
.END</P>
<P CLASS="BodyAfterHead">
<A NAME="pgfId=17358">
</A>
This file has the following features:</P>
<UL>
<LI CLASS="BulletFirst">
<A NAME="pgfId=17359">
</A>
The PI segment elements (<SPAN CLASS="BodyComputer">
C1</SPAN>
, <SPAN CLASS="BodyComputer">
C2</SPAN>
, and <SPAN CLASS="BodyComputer">
R2</SPAN>
) have the same values as the previous example.</LI>
<LI CLASS="BulletList">
<A NAME="pgfId=17360">
</A>
The pin-to-pin delays are modeled at each of the gate inputs with a capacitor of value 1 pF (<SPAN CLASS="BodyComputer">
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