ch14.5.htm
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one-controllability</SPAN>
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. For example, the <SPAN CLASS="Definition">
combinational zero-controllability</SPAN>
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</A>
for a two-input AND gate, Y = AND (X<SUB CLASS="Subscript">
1</SUB>
, X<SUB CLASS="Subscript">
2</SUB>
), is recursively defined in terms of the input controllability values as follows: </P>
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<P CLASS="TableEqn">
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CC0 (Y) = min { CC0 (X<SUB CLASS="Subscript">
1</SUB>
), CC0 (X<SUB CLASS="Subscript">
2</SUB>
) } + 1 .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
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</A>
<A NAME="18533">
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(14.5)</P>
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</TABLE>
<P CLASS="BodyAfterHead">
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We choose the minimum value of the two-input controllability values to reflect the fact that we can justify the output of an AND gate to '0' by setting any input to the control value of '0'. We then add one to this value to reflect the fact that we have passed through an additional level of logic. Incrementing the controllability measures for each level of logic represents a measure of the <SPAN CLASS="Definition">
logic distance</SPAN>
<A NAME="marker=81119">
</A>
between two nodes.</P>
<P CLASS="Body">
<A NAME="pgfId=140873">
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We define the <SPAN CLASS="Definition">
combinational one-controllability</SPAN>
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</A>
for a two-input AND gate as </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=140876">
</A>
CC1 (Y) = CC1(X<SUB CLASS="Subscript">
1</SUB>
) + CC1 (X<SUB CLASS="Subscript">
2</SUB>
) + 1 .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
<A NAME="pgfId=140878">
</A>
(14.6)</P>
</TD>
</TR>
</TABLE>
<P CLASS="BodyAfterHead">
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</A>
This equation reflects the fact that we need to set all inputs of an AND gate to the enabling value of '1' to justify a '1' at the output. <A HREF="CH14.5.htm#40341" CLASS="XRef">
Figure 14.21</A>
(a) illustrates these definitions. </P>
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<P CLASS="TableFigure">
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</P>
<DIV>
<IMG SRC="CH14-22.gif">
</DIV>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableFigureTitle">
<A NAME="pgfId=140894">
</A>
FIGURE 14.21 <A NAME="40341">
</A>
Controllability measures. (a) Definition of combinational zero-controllability, CC0, and combinational one-controllability, CC1, for a two-input AND gate. (b) Examples of controllability calculations for simple gates, showing intermediate steps. (c) Controllability in a combinational circuit.</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=81128">
</A>
An inverter, Y = NOT (X), reverses the controllability values: </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=135233">
</A>
CC1 (Y) = CC0 (X) + 1 and CC0 (Y) = CC1 (X) + 1 .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
<A NAME="pgfId=135235">
</A>
<A NAME="33526">
</A>
(14.7)</P>
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</TR>
</TABLE>
<P CLASS="Body">
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</A>
Since we can construct all other logic cells from combinations of two-input AND gates and inverters we can use Eqs. <A HREF="CH14.5.htm#18533" CLASS="XRef">
14.5</A>
–<A HREF="CH14.5.htm#33526" CLASS="XRef">
14.7</A>
to derive their controllability equations. When we do this we only increment the controllability by one for each primitive gate. Thus for a three-input NAND with an inverting input, Y = NAND (X<SUB CLASS="Subscript">
1</SUB>
, X<SUB CLASS="Subscript">
2</SUB>
, NOT (X<SUB CLASS="Subscript">
3</SUB>
)): </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=170097">
</A>
CC0 (Y) = CC1 (X<SUB CLASS="Subscript">
1</SUB>
) + CC1 (X<SUB CLASS="Subscript">
2</SUB>
) + CC0 (X<SUB CLASS="Subscript">
3</SUB>
) + 1 ,</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=170099">
</A>
</P>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=170101">
</A>
CC1 (Y) = min { CC0 (X<SUB CLASS="Subscript">
1</SUB>
), CC0 (X<SUB CLASS="Subscript">
2</SUB>
), CC1 (X<SUB CLASS="Subscript">
3</SUB>
) } + 1 .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
<A NAME="pgfId=170103">
</A>
(14.8)</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
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</A>
For a two-input NOR, Y = NOR (X<SUB CLASS="Subscript">
1</SUB>
, X<SUB CLASS="Subscript">
2</SUB>
) = NOT (AND (NOT (X<SUB CLASS="Subscript">
1</SUB>
), NOT (X<SUB CLASS="Subscript">
2</SUB>
)): </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=135259">
</A>
CC1 (Y) = min { CC1 (X<SUB CLASS="Subscript">
1</SUB>
), CC1 (X<SUB CLASS="Subscript">
2</SUB>
) } + 1 ,</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=135261">
</A>
</P>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=135736">
</A>
CC0 (Y) = CC0 (X<SUB CLASS="Subscript">
1</SUB>
) + CC0 (X<SUB CLASS="Subscript">
2</SUB>
) + 1 .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
<A NAME="pgfId=135738">
</A>
(14.9)</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=81220">
</A>
<A HREF="CH14.5.htm#40341" CLASS="XRef">
Figure 14.21</A>
(b) shows examples of controllability calculations. A bubble on a logic gate at the input or output swaps the values of CC1 and CC0. <A HREF="CH14.5.htm#40341" CLASS="XRef">
Figure 14.21</A>
(c) shows how controllability values for a combinational circuit are calculated by working forward from each PI that is defined to have a controllability of one.</P>
<P CLASS="Body">
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</A>
We define observability in terms of the controllability measures. The <SPAN CLASS="Definition">
combinational observability</SPAN>
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</A>
, OC (X<SUB CLASS="Subscript">
1</SUB>
), of input X<SUB CLASS="Subscript">
1</SUB>
of a two-input AND gate can be expressed in terms of the controllability of the other input CC1 (X<SUB CLASS="Subscript">
2</SUB>
) and the combinational observability of the output, OC (Y): </P>
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<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=135445">
</A>
OC (X<SUB CLASS="Subscript">
1</SUB>
) = CC1 (X<SUB CLASS="Subscript">
2</SUB>
) + OC (Y) + 1 .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
<A NAME="pgfId=135447">
</A>
(14.10)</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=81440">
</A>
If a node X<SUB CLASS="Subscript">
1</SUB>
branches (has fanout) to nodes X<SUB CLASS="Subscript">
2</SUB>
and X<SUB CLASS="Subscript">
3</SUB>
we choose the most observable of the branches: </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=135458">
</A>
OC (X<SUB CLASS="Subscript">
1</SUB>
) = min { O (X<SUB CLASS="Subscript">
2</SUB>
) + O (X<SUB CLASS="Subscript">
3</SUB>
) } .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
<A NAME="pgfId=135460">
</A>
(14.11)</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=81468">
</A>
<A HREF="CH14.5.htm#16722" CLASS="XRef">
Figure 14.22</A>
(a) and (b) show the definitions of observability. <A HREF="CH14.5.htm#16722" CLASS="XRef">
Figure 14.22</A>
(c) illustrates calculation of observability at a three-input NAND; notice we sum the CC1 values for the other inputs (since the enabling value for a NAND gate is one, the same as for an AND gate). <A HREF="CH14.5.htm#16722" CLASS="XRef">
Figure 14.22</A>
(d) shows the calculation of observability working back from the PO which, by definition, has an observability of zero.</P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableFigure">
<A NAME="pgfId=81519">
</A>
</P>
<DIV>
<IMG SRC="CH14-23.gif">
</DIV>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableFigureTitle">
<A NAME="pgfId=81521">
</A>
FIGURE 14.22 <A NAME="16722">
</A>
Observability measures. (a) The combinational observability, OC(X<SUB CLASS="Subscript">
1</SUB>
), of an input, X<SUB CLASS="Subscript">
1</SUB>
, to a two-input AND gate defined in terms of the controllability of the other input and the observability of the output. (b) The observability of a fanout node is equal to the observability of the most observable branch. (c) Example of an observability calculation at a three-input NAND gate. (d) The observability of a combinational network can be calculated from the controllability measures, CC0:CC1. The observability of a PO (primary output) is defined to be zero.</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=81512">
</A>
Sequential controllability and observability can be measured using similar equations to the combinational measures except that in the sequential measures (SC1, SC0, and OS) we measure logic distance in terms of the layers of sequential logic, not the layers of combinational logic.</P>
</DIV>
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