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<H2>10.11 Operators</H2>
<P><A NAME="pgfId=7756"></A>Table 10.16 shows the predefined VHDL operators,
listed by their (increasing) order of precedence [<A HREF="../../VHDL/LRM/HTML/1076_7.HTM#7.2">VHDL
93LRM7.2</A>]. The shift operators and the <TT>xnor</TT> operator were added
in VHDL-93. <TABLE BORDER="1" CELLSPACING="2" CELLPADDING="2">
<TR>
<TD COLSPAN="2"><A NAME="pgfId=7761"></A>TABLE 10.16 VHDL predefined
operators (listed by increasing order of precedence). <A HREF="#pgfId=539350" CLASS="footnote">1</A></TD></TR>
<TR>
<TD><A NAME="pgfId=7765"></A>logical_operator <A HREF="#pgfId=426062" CLASS="footnote">2</A>
::=</TD>
<TD><A NAME="pgfId=7767"></A>and | or | nand | nor | xor <U>| xnor</U></TD></TR>
<TR>
<TD><A NAME="pgfId=8014"></A>relational_operator ::=</TD>
<TD><A NAME="pgfId=8016"></A>= | /= | < | <= | > | >=</TD></TR>
<TR>
<TD><A NAME="pgfId=8010"></A>shift_operator <A HREF="#pgfId=426062" CLASS="footnote">2</A>
::=</TD>
<TD><A NAME="pgfId=8012"></A><U>sll | srl | sla | sra | rol | ror</U></TD></TR>
<TR>
<TD><A NAME="pgfId=8006"></A>adding_operator ::=</TD>
<TD><A NAME="pgfId=8008"></A>+ | - | &</TD></TR>
<TR>
<TD><A NAME="pgfId=341879"></A>sign ::=</TD>
<TD><A NAME="pgfId=341881"></A>+ | -</TD></TR>
<TR>
<TD><A NAME="pgfId=8002"></A>multiplying_operator ::=</TD>
<TD><A NAME="pgfId=8004"></A>* | / | mod | rem</TD></TR>
<TR>
<TD><A NAME="pgfId=7998"></A>miscellaneous_operator ::=</TD>
<TD><A NAME="pgfId=8000"></A>** | abs | not</TD></TR>
</TABLE>
<A NAME="pgfId=17498"></A>The binary logical operators (<TT>and</TT>
, <TT>or</TT> , <TT>nand</TT> , <TT>nor</TT> , <TT>xor</TT> , <TT>xnor</TT>)
and the unary <TT>not</TT> logical operator are predefined for types <TT>BIT</TT>
or <TT>BOOLEAN</TT> and one-dimensional arrays whose element type is <TT>BIT</TT>
or <TT>BOOLEAN</TT> . The operands must be of the same base type for the
binary logical operators and the same length if they are arrays. <A NAME="pgfId=17499"></A>Both operands of relational operators must be of the same
type and the result type is <TT>BOOLEAN</TT> . The equality operator and
inequality operator (<TT>'='</TT> and <TT>'/='</TT>) are defined for all
types (other than file types). The remaining relational operators, ordering
operators, are predefined for any scalar type, and for any one-dimensional
array whose elements are of a discrete type (enumeration or integer type).
<P CLASS="Body"><A NAME="pgfId=17517"></A>The left operand of the shift
operators (VHDL-93 only) is a one-dimensional array with element type of
<TT>BIT</TT> or <TT>BOOLEAN</TT> ; the right operand must be <TT>INTEGER</TT>
. <P CLASS="Body"><A NAME="pgfId=17515"></A>The adding operators (<TT>'+'</TT>
and <TT>'-'</TT>) are predefined for any numeric type. You cannot use the
adding operators on <TT>BIT</TT> or <TT>BIT_VECTOR</TT> without overloading.
The concatenation operator <TT>'&'</TT> is predefined for any one-dimensional
array type. The signs (<TT>'+'</TT> and <TT>'-'</TT>) are defined for any
numeric type. <P CLASS="Body"><A NAME="pgfId=17566"></A>The multiplying
operators are: <TT>'*'</TT> , <TT>'/'</TT> , <TT>mod</TT> , and <TT>rem</TT>
. The operators <TT>'*'</TT> and <TT>'/'</TT> are predefined for any integer
or floating-point type, and the operands and the result are of the same
type. The operators <TT>mod</TT> and <TT>rem</TT> are predefined for any
integer type, and the operands and the result are of the same type. In addition,
you can multiply an <TT>INTEGER</TT> or <TT>REAL</TT> by any physical type
and the result is the physical type. You can also divide a physical type
by <TT>REAL</TT> or <TT>INTEGER</TT> and the result is the physical type.
If you divide a physical type by the same physical type, the result is an
<TT>INTEGER</TT> (actually type <TT>UNIVERSAL_INTEGER</TT> , which is a
predefined anonymous type [<A HREF="../../VHDL/LRM/HTML/1076_7.HTM#7.5">VHDL LRM7.5</A>]).
Once again--you cannot use the multiplying operators on <TT>BIT</TT> or
<TT>BIT_VECTOR</TT> types without overloading the operators. <P CLASS="Body"><A NAME="pgfId=17604"></A>The exponentiating operator, <TT>'**'</TT> , is predefined
for integer and floating-point types. The right operand, the exponent, is
type <TT>INTEGER</TT> . You can only use a negative exponent with a left
operand that is a floating-point type, and the result is the same type as
the left operand. The unary operator <TT>abs</TT> (absolute value) is predefined
for any numeric type and the result is the same type. The operators <TT>abs</TT>
, <TT>'**'</TT> , and <TT>not</TT> are grouped as miscellaneous operators.
<P CLASS="Body"><A NAME="pgfId=28485"></A>Here are some examples of the
use of VHDL operators:</P>
<PRE><B>entity</B> Operator_1 <B>is</B> <B>end</B>; <B>architecture</B> Behave <B>of</B> Operator_1 <B>is</B>
<B>begin</B> <B>process</B>
<B>variable</B> b : BOOLEAN; <B>variable</B> bt : BIT := '1'; <B>variable</B> i : INTEGER;
<B>variable</B> pi : REAL := 3.14; <B>variable</B> epsilon : REAL := 0.01;
<B>variable</B> bv4 : BIT_VECTOR (3 <B>downto</B> 0) := "0001";
<B>variable</B> bv8 : BIT_VECTOR (0 <B>to</B> 7);
<B>begin</B>
b := "0000" < bv4; -- b is TRUE, "0000" treated as BIT_VECTOR.
b := 'f' > 'g'; -- b is FALSE, 'dictionary' comparison.
bt := '0' <B>and</B> bt; -- bt is '0', analyzer knows '0' is BIT.
bv4 := <B>not</B> bv4; -- bv4 is now "1110".
i := 1 + 2; -- Addition, must be compatible types.
i := 2 ** 3; -- Exponentiation, exponent must be integer.
i := 7/3; -- Division, L/R rounded towards zero, i=2.
i := 12 <B>rem</B> 7; -- Remainder, i=5. In general:
-- L rem R = L-((L/R)*R).
i := 12 <B>mod</B> 7; -- modulus, i=5. In general:
-- L mod R = L-(R*N) for an integer N.
-- shift := sll | srl | sla | sra | rol | ror (VHDL-93 only)
bv4 := "1001" <B>srl</B> 2; -- Shift right logical, now bv4="0100".
-- Logical shift fills with T'LEFT.
bv4 := "1001" <B>sra</B> 2; -- Shift right arithmetic, now bv4="0111".
-- Arithmetic shift fills with element at end being vacated.
bv4 := "1001" <B>ror </B>2; -- Rotate right, now bv4="0110".
-- Rotate wraps around.
-- Integer argument to any shift operator may be negative or zero.
<B>if</B> (pi*2.718)/2.718 = 3.14 <B>then</B> <B>wait</B>; <B>end</B> <B>if</B>; -- This is unreliable.
<B>if</B> (<B>abs</B>(((pi*2.718)/2.718)-3.14)<epsilon) <B>then</B> <B>wait</B>; <B>end</B> <B>if</B>; -- Better.
bv8 := bv8(1 <B>to</B> 7) & bv8(0); -- Concatenation, a left rotation.
<B>wait</B>; <B>end</B> <B>process</B>;
<B>end</B>;</PRE>
<P><HR ALIGN="LEFT"><SPAN CLASS="footnoteNumber">1.</SPAN> <A NAME="pgfId=539350"></A>The
not operator is a logical operator but has the precedence of a miscellaneous
operator. <SPAN CLASS="footnoteNumber">2.</SPAN> <A NAME="pgfId=426062"></A>Underline
means "new to VHDL-93." <HR ALIGN="LEFT"></P>
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