ch11.16.htm

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  <TITLE> 11.16&nbsp;&nbsp;&nbsp;Bibliography</TITLE>

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<H1>11.16&nbsp;&nbsp;&nbsp;Bibliography</H1>



<P><P CLASS="BodyAfterHead"><A NAME="pgfId=184446"></A>The IEEE Verilog

LRM [1995] is less intimidating than the IEEE VHDL LRM, because it is based

on the OVI LRM, which in turn was based on the Verilog-XL simulator reference

manual. Thus it has more of a &quot;User's Guide&quot; flavor and is required

reading for serious Verilog users. It is the only source for detailed information

on the PLI.</P>



<P><P CLASS="Body"><A NAME="pgfId=184448"></A>Phil Moorby was one of the

original architects of the Verilog language. The Thomas and Moorby text

is a good introduction to Verilog [1991]. The code examples from this book

can be obtained from the World Wide Web. Palnitkar's book includes an example

of the use of the PLI routines [1996].</P>



<P><P CLASS="Body"><A NAME="pgfId=184452"></A>Open Verilog International

(OVI) has a Web site maintained by Chronologic (<CODE> http://www.chronologic.com/ovi</CODE>

) with membership information and addresses and an ftp site maintained by

META-Software (<CODE> ftp://ftp.metasw.com</CODE> in <CODE>/pub/OVI/</CODE>

). OVI sells reference material, including proceedings from the International

Verilog HDL Conference.</P>



<P><P CLASS="Body"><A NAME="pgfId=184456"></A>The newsgroup <CODE>comp.lang.verilog</CODE>

(with a FAQ--frequently asked questions) is accessible from a number of

online sources. The FAQ includes a list of reference materials and book

reviews. Cray Research maintained an archive for <CODE>comp.lang.verilog</CODE>

going back to 1993 but this was lost in January 1997 and is still currently

unavailable. Cadence has a discussion group at <CODE>talkverilog@cadence.com</CODE>

. Wellspring Solutions offers VeriWell, a no-cost, limited capability, Verilog

simulator for UNIX, PC, and Macintosh platforms.</P>



<P><P CLASS="Body"><A NAME="pgfId=184459"></A>There is a free, &quot;copylefted&quot;

Verilog simulator, <CODE>vbs</CODE> , written by Jimen Ching and Lay Hoon

Tho as part of their Master's theses at the University of Hawaii, which

is part of the <CODE>comp.lang.verilog</CODE> archive. The package includes

explanations of the mechanics of a digital event-driven simulator, including

event queues and time wheels.</P>



<P><P CLASS="Body"><A NAME="pgfId=201204"></A>More technical references

are included as part of Appendix B.</P>



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