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140</P>
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28, 33, 157, 172</P>
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53, 54</P>
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95, 190, 203</P>
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53, 54</P>
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41</SPAN>
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14, 111</P>
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138, 183</P>
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66, 68, 123</P>
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See below</P>
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15</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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&nbsp;</P>
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19</SPAN>
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19, 20, 67, 109, 126, 132, 145, 146, 153, 158, 161, 175, 177, 179, 189</P>
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52</SPAN>
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6, 8, 9, 17, 18, 25, 32, 50, 52, 55, 89, 90, 99, 100, 106, 108, 109, 112, 122, 131, 146, 159, 161, 163, 187, 192, 197, 207</P>
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21, 35, 48, 49, 50, 51, 55, 56, 67, 69, 78, 84, 85, 91, 93, 100, 101, 102, 103, 104, 108, 109, 113, 124, 126, 132, 133, 143, 145, 146, 158, 161, 166, 179, 188, 191, 192, 199, 200, 202, 204</P>
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12, 45, 98, 116, 118</P>
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101</SPAN>
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12, 45, 98, 116, 118, 134, 137, 151</P>
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126</SPAN>
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12, 45, 98, 116, 118, 151</P>
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153</SPAN>
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66, 68, 101, 102, 104, 107, 123, 154, 160</P>
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181</SPAN>
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1, 56, 64, 89, 133, 166, 182</P>
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<A NAME="pgfId=83336">
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&nbsp;</P>
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<TD ROWSPAN="1" COLSPAN="9">
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&nbsp;</P>
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<P CLASS="zAppBody">
<A NAME="pgfId=54436">
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<A HREF="APP2.3.htm#12661" CLASS="XRef">
Table&nbsp;B.2</A>
 is a list of the 102 Verilog HDL keywords in the 95 LRM and an index to the rules that reference these keywords. Note the spelling of the keyword <A NAME="marker=54478">
 </A>
scalared (not scalered). For <A NAME="marker=58746">
 </A>
example, to find out how to use the keyword <SPAN CLASS="BodyComputer">
parameter</SPAN>
 to define a constant, we look up <SPAN CLASS="Emphasis">
parameter</SPAN>
 in <A HREF="APP2.3.htm#12661" CLASS="XRef">
Table&nbsp;B.2</A>
 to find rule 129 (<SPAN CLASS="BodyComputer">
parameter_declaration</SPAN>
), which includes a reference to section 3.10 of the 95 LRM. The index in this book will also help (the entry for <SPAN CLASS="Emphasis">
parameter</SPAN>
 points you to examples in Section&nbsp;11.2.4, &#8220;Numbers,&#8221; in this case).</P>
<P CLASS="zAppBody">
<A NAME="pgfId=54472">
 </A>
There are many Verilog tools currently available that use many versions of the Verilog language. Most tool vendors explain which of the Verilog constructs are supported; many use the 95 LRM BNF syntax in this explanation.</P>
<TABLE>
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<A NAME="pgfId=82136">
 </A>
TABLE&nbsp;B.2&nbsp;<A NAME="12661">
 </A>
Verilog HDL keywords and index (list of rules that reference a keyword).</P>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82146">
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<SPAN CLASS="Bold">
always</SPAN>
 1</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82147">
 </A>
<SPAN CLASS="Bold">
and</SPAN>
 115</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82148">
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<SPAN CLASS="Bold">
assign</SPAN>
 22, 147</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82149">
 </A>
<SPAN CLASS="Bold">
begin</SPAN>
 166</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82150">
 </A>
<SPAN CLASS="Bold">
buf</SPAN>
 117</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82151">
 </A>
<SPAN CLASS="Bold">
bufif0</SPAN>
 44</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82152">
 </A>
<SPAN CLASS="Bold">
bufif1</SPAN>
 44</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82153">
 </A>
<SPAN CLASS="Bold">
case</SPAN>
 9</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82154">
 </A>
<SPAN CLASS="Bold">
casex</SPAN>
 9</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82155">
 </A>
<SPAN CLASS="Bold">
casez</SPAN>
 9</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82156">
 </A>
<SPAN CLASS="Bold">
cmos</SPAN>
 11</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82157">
 </A>
<SPAN CLASS="Bold">
deassign</SPAN>
 147</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82158">
 </A>
<SPAN CLASS="Bold">
default</SPAN>
 8</P>
<P CLASS="zAppTableLeft">
<A NAME="pgfId=82159">
 </A>
<SPAN CLASS="Bold">
defparam</SPAN>
 130</P>
<P CLASS="zAppTableLeft">
<A NAME="pgf