ch03.3.htm

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r)</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableFirst">
<A NAME="pgfId=153780">
 </A>
<SPAN CLASS="TableHeads">
Parasitic delay/</SPAN>
<SPAN CLASS="Symbol">
t</SPAN>
</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableFirst">
<A NAME="pgfId=153782">
 </A>
Nonideal delay/<SPAN CLASS="Symbol">
t</SPAN>
</P>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153784">
 </A>
inverter</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153786">
 </A>
1 (by definition)</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153788">
 </A>
1 (by definition)</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153794">
 </A>
<SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 (by definition)<A HREF="#pgfId=153793" CLASS="footnote">
1</A>
</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153799">
 </A>
<SPAN CLASS="EquationVariables">
q</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 (by definition)<SUP CLASS="Superscript">
1</SUP>
</P>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153801">
 </A>
<SPAN CLASS="EmphasisPrefix">
n</SPAN>
-input NAND</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153803">
 </A>
(<SPAN CLASS="EquationVariables">
n</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
+<SPAN CLASS="Symbol">
 </SPAN>
2)/3</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153805">
 </A>
(<SPAN CLASS="EquationVariables">
n</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
+<SPAN CLASS="Symbol">
 </SPAN>
<SPAN CLASS="EquationVariables">
r </SPAN>
)/(<SPAN CLASS="EquationVariables">
r</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
+<SPAN CLASS="Symbol">
 </SPAN>
1)</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153807">
 </A>
<SPAN CLASS="EquationVariables">
n</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
<SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153809">
 </A>
<SPAN CLASS="EquationVariables">
n</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
<SPAN CLASS="EquationVariables">
q</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
</P>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153811">
 </A>
<SPAN CLASS="EmphasisPrefix">
n</SPAN>
-input NOR</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153813">
 </A>
(2<SPAN CLASS="EquationVariables">
n</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
+<SPAN CLASS="Symbol">
 </SPAN>
1)/3</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153815">
 </A>
(<SPAN CLASS="EquationVariables">
nr</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
+<SPAN CLASS="Symbol">
 </SPAN>
1)/(<SPAN CLASS="EquationVariables">
r</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
+<SPAN CLASS="Symbol">
 </SPAN>
1)</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153817">
 </A>
<SPAN CLASS="EquationVariables">
n</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
<SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="Table">
<A NAME="pgfId=153819">
 </A>
<SPAN CLASS="EquationVariables">
n</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
<SPAN CLASS="EquationVariables">
q</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=87969">
 </A>
The parasitic delay arises from parasitic capacitance at the output node of a single-stage logic cell and most (but not all) of this is due to the source and drain capacitance. The parasitic delay of a minimum-size inverter is  </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=222602">
 </A>
<SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 = <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="SubscriptVariable">
p</SUB>
/ <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
<A NAME="pgfId=222604">
 </A>
(3.25)</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=87974">
 </A>
The parasitic delay is a constant, for any technology. For our C5 technology we know <SPAN CLASS="EquationVariables">
RC</SPAN>
<SUB CLASS="SubscriptVariable">
p</SUB>
<SPAN CLASS="Symbol">
 </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
0.06<SPAN CLASS="Symbol">
 </SPAN>
ns and, using Eq.&nbsp;<A HREF="#32931" CLASS="XRef">
3.17</A>
 for a minimum-size inverter, we can calculate <SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
<SPAN CLASS="Symbol">
 </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
<SPAN CLASS="EquationVariables">
RC</SPAN>
<SUB CLASS="SubscriptVariable">
p</SUB>
/<SPAN CLASS="Symbol">
t </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
0.06/0.06<SPAN CLASS="Symbol">
 </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
1 (this is purely a coincidence). Thus <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="SubscriptVariable">
p</SUB>
 is about equal to <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 and is approximately 0.036<SPAN CLASS="Symbol">
 </SPAN>
pF. There is a large error in calculating <SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 from extracted delay values that are so small. Often we can calculate <SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 more accurately from estimating the parasitic capacitance from layout.</P>
<P CLASS="Body">
<A NAME="pgfId=87978">
 </A>
Because <SPAN CLASS="EquationVariables">
RC</SPAN>
<SUB CLASS="SubscriptVariable">
p</SUB>
 is constant, the parasitic delay is equal to the ratio of parasitic capacitance of a logic cell to the parasitic capacitance of a minimum-size inverter. In practice this ratio is very difficult to calculate&#8212;it depends on the layout. We can approximate the parasitic delay by assuming it is proportional to the sum of the widths of the <SPAN CLASS="EmphasisPrefix">
n</SPAN>
-channel and <SPAN CLASS="EmphasisPrefix">
p</SPAN>
-channel transistors connected to the output. Table&nbsp;<A HREF="#26377" CLASS="XRef">
3.2</A>
 shows the parasitic delay for different cells in terms of <SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
.</P>
<P CLASS="Body">
<A NAME="pgfId=88033">
 </A>
The <SPAN CLASS="Definition">
nonideal delay</SPAN>
<A NAME="marker=88032">
 </A>
 <SPAN CLASS="EquationVariables">
q</SPAN>
 is hard to predict and depends mainly on the physical size of the logic cell (proportional to the cell area in general, or width in the case of a standard cell or a gate-array macro),  </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=222611">
 </A>
<SPAN CLASS="EquationVariables">
q</SPAN>
 = <SPAN CLASS="EquationVariables">
st</SPAN>
<SUB CLASS="SubscriptVariable">
q </SUB>
/<SPAN CLASS="Symbol">
t</SPAN>
 .</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnNumber">
<A NAME="pgfId=222613">
 </A>
<A NAME="19010">
 </A>
(3.26)</P>
</TD>
</TR>
</TABLE>
<P CLASS="Body">
<A NAME="pgfId=88038">
 </A>
We define <SPAN CLASS="EquationVariables">
q</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 in the same way we defined <SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
. An <SPAN CLASS="EquationVariables">
n</SPAN>
-input cell is approximately <SPAN CLASS="EquationVariables">
n</SPAN>
 times larger than an inverter, giving the values for nonideal delay shown in Table&nbsp;<A HREF="#26377" CLASS="XRef">
3.2</A>
. For our C5 technology, from Eq.&nbsp;<A HREF="#32931" CLASS="XRef">
3.17</A>
, <SPAN CLASS="EquationVariables">
q</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
<SPAN CLASS="Symbol">
 </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
<SPAN CLASS="EquationVariables">
t</SPAN>
<SUB CLASS="SubscriptVariable">
q</SUB>
<SUB CLASS="Subscript">
inv</SUB>
/<SPAN CLASS="Symbol">
t </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
0.1<SPAN CLASS="Symbol">
 </SPAN>
ns/0.06<SPAN CLASS="Symbol">
 </SPAN>
ns<SPAN CLASS="Symbol">
 </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
1.7.</P>
<DIV>
<H3 CLASS="Heading2">
<A NAME="pgfId=88045">
 </A>
3.3.1&nbsp;<A NAME="42102">
 </A>
Predicting Delay</H3>
<P CLASS="BodyAfterHead">
<A NAME="pgfId=109180">
 </A>
As an example, let us predict the delay of a three-input NOR logic cell with 2X drive, driving a net with a fanout of four, with a total load capacitance (comprising the input capacitance of the four cells we are driving plus the interconnect) of 0.3<SPAN CLASS="Symbol">
 </SPAN>
pF.</P>
<P CLASS="Body">
<A NAME="pgfId=295199">
 </A>
From Table&nbsp;<A HREF="#26377" CLASS="XRef">
3.2</A>
 we see <SPAN CLASS="EquationVariables">
p</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
3<SPAN CLASS="EquationVariables">
p</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 and <SPAN CLASS="EquationVariables">
q</SPAN>
<SPAN CLASS="Symbol">
 </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
3<SPAN CLASS="EquationVariables">
q</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
 for this cell. We can calculate <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="Subscript">
in</SUB>
 from the fact that the input gate capacitance of a 1X drive, three-input NOR logic cell is equal to <SPAN CLASS="EquationVariables">
gC</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
, and for a 2X logic cell, <SPAN CLASS="EquationVariables">
C</SPAN>
<SUB CLASS="Subscript">
in</SUB>
 <SPAN CLASS="Symbol">
 </SPAN>
=<SPAN CLASS="Symbol">
 </SPAN>
2<SPAN CLASS="EquationVariables">
gC</SPAN>
<SUB CLASS="Subscript">
inv</SUB>
. Thus,  </P>
<TABLE>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=295755">
 </A>
&nbsp;</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=295757">
 </A>
&nbsp;</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295759">
 </A>
C<SUB CLASS="Subscript">
out</SUB>
</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295761">
 </A>
&nbsp;</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295818">
 </A>
<SPAN CLASS="EquationVariables">
g</SPAN>
&#183;(0.3&nbsp;pF)</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295820">
 </A>
&nbsp;</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295822">
 </A>
(0.3&nbsp;pF)</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnLeft">
<A NAME="pgfId=296286">
 </A>
&nbsp;</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=295763">
 </A>
&nbsp;</P>
</TD>
</TR>
<TR>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=295765">
 </A>
<SPAN CLASS="EquationVariables">
gh</SPAN>
<SPAN CLASS="Symbol">
 =</SPAN>
</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqn">
<A NAME="pgfId=295767">
 </A>
<SPAN CLASS="EquationVariables">
g</SPAN>
</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295769">
 </A>
&#8211;&#8211;&#8211;&#8211;&#8211;</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295771">
 </A>
=</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295824">
 </A>
&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295826">
 </A>
=</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnCenter">
<A NAME="pgfId=295828">
 </A>
&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;&#8211;</P>
</TD>
<TD ROWSPAN="1" COLSPAN="1">
<P CLASS="TableEqnLeft">
<A NAME="pgfId=296288">
 </A>