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<TITLE> 4.1&nbsp;The Antifuse</TITLE></HEAD><!--#include file="top.html"--><!--#include file="header.html"-->



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<P>[&nbsp;<A HREF="CH04.htm">Chapter&nbsp;start</A>&nbsp;]&nbsp;[&nbsp;<A HREF="CH04.htm">Previous&nbsp;page</A>&nbsp;]&nbsp;[&nbsp;<A HREF="CH04.2.htm">Next&nbsp;page</A>&nbsp;]</P><!--#include file="AmazonAsic.html"--><HR></DIV>

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<A NAME="pgfId=1061">

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4.1&nbsp;<A NAME="38549">

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The Antifuse</H1>

<P CLASS="BodyAfterHead">

<A NAME="pgfId=41642">

 </A>

An <SPAN CLASS="Definition">

antifuse</SPAN>

<A NAME="marker=41641">

 </A>

 is the opposite of a regular fuse&#8212;an antifuse is normally an open circuit until you force a <SPAN CLASS="Definition">

programming current</SPAN>

<A NAME="marker=41643">

 </A>

 through it (about 5 mA). In a poly&#8211;diffusion antifuse the high current density causes a large power dissipation in a small area, which melts a thin insulating dielectric between polysilicon and diffusion electrodes and forms a thin (about 20 nm in diameter), permanent, and resistive silicon <SPAN CLASS="Definition">

link</SPAN>

<A NAME="marker=41644">

 </A>

. The programming process also drives dopant atoms from the poly and diffusion electrodes into the link, and the final level of doping determines the resistance value of the link. Actel calls its antifuse a <A NAME="marker=41645">

 </A>

programmable low-impedance circuit element (<A NAME="marker=41646">

 </A>

<SPAN CLASS="Definition">

PLICE</SPAN>

<SPAN CLASS="Symbol">

&#8216;</SPAN>

). </P>

<P CLASS="Body">

<A NAME="pgfId=22631">

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<A HREF="CH04.1.htm#13471" CLASS="XRef">

Figure&nbsp;4.1</A>

 shows a poly&#8211;diffusion antifuse with an <A NAME="marker=9469">

 </A>

<SPAN CLASS="Definition">

oxide&#8211;nitride&#8211;oxide</SPAN>

 (<A NAME="marker=9470">

 </A>

<SPAN CLASS="Definition">

ONO</SPAN>

<A NAME="marker=22581">

 </A>

) dielectric sandwich of: silicon dioxide (SiO<SUB CLASS="Subscript">

2</SUB>

) grown over the <SPAN CLASS="EmphasisPrefix">

n</SPAN>

-type antifuse diffusion, a silicon nitride (Si<SUB CLASS="Subscript">

3</SUB>

N<SUB CLASS="Subscript">

4</SUB>

) layer, and another thin SiO<SUB CLASS="Subscript">

2</SUB>

 layer. The layered ONO dielectric results in a tighter spread of blown antifuse resistance values than using a single-oxide dielectric. The effective electrical thickness is equivalent to 10nm of SiO<SUB CLASS="Subscript">

2</SUB>

 (Si<SUB CLASS="Subscript">

3</SUB>

N<SUB CLASS="Subscript">

4</SUB>

 has a higher dielectric constant than SiO<SUB CLASS="Subscript">

2</SUB>

, so the actual thickness is less than 10 nm). Sometimes this device is called a <A NAME="marker=1084">

 </A>

fuse even though it is an <SPAN CLASS="Emphasis">

anti</SPAN>

fuse, and both terms are often used interchangeably.</P>

<TABLE>

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<A NAME="pgfId=22539">

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<IMG SRC="CH04-1.gif" ALIGN="BASELINE">

&nbsp;</P>

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<P CLASS="TableFigureTitle">

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FIGURE&nbsp;4.1&nbsp;<A NAME="13471">

 </A>

 Actel antifuse. (a)&nbsp;A cross section. (b)&nbsp;A simplified drawing. The ONO (oxide&#8211;nitride&#8211;oxide) dielectric is less than 10 nm thick, so this diagram is not to scale. (c)&nbsp;From above, an antifuse is approximately the same size as a contact.</P>

</TD>

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</TABLE>

<P CLASS="Body">

<A NAME="pgfId=17029">

 </A>

The fabrication process and the programming current control the average resistance of a blown antifuse, but values vary as shown in <A HREF="CH04.1.htm#40226" CLASS="XRef">

Figure&nbsp;4.2</A>

. In a particular technology a programming current of 5 mA may result in an average blown antifuse resistance of about 500 <SPAN CLASS="Symbol">

W </SPAN>

. Increasing the programming current to 15 mA might reduce the average antifuse resistance to 100 <SPAN CLASS="Symbol">

W</SPAN>

 . Antifuses separate interconnect wires on the FPGA chip and the programmer blows an antifuse to make a permanent connection. Once an antifuse is programmed, the process cannot be reversed. This is an OTP technology (and <A NAME="marker=24088">

 </A>

radiation hard). An Actel 1010, for example, contains 112,000 antifuses (see <A HREF="CH04.1.htm#18370" CLASS="XRef">

Table&nbsp;4.1</A>

), but we typically only need to program about 2&nbsp;percent of the fuses on an Actel chip.</P>

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<P CLASS="Table">

<A NAME="pgfId=17139">

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&nbsp;</P>

</TD>

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<P CLASS="Table">

<A NAME="pgfId=17141">

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&nbsp;</P>

</TD>

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<P CLASS="Table">

<A NAME="pgfId=17143">

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&nbsp;</P>

</TD>

<TD ROWSPAN="8" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17148">

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&nbsp;</P>

<DIV>

<IMG SRC="CH04-2.gif">

</DIV>

</TD>

</TR>

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<P CLASS="TableTitle">

<A NAME="pgfId=17151">

 </A>

TABLE&nbsp;4.1&nbsp;<A NAME="18370">

 </A>

Number of <BR>

antifuses on Actel FPGAs.</P>

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<A NAME="pgfId=17155">

 </A>

&nbsp;</P>

</TD>

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<TR>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17159">

 </A>

<SPAN CLASS="TableHeads">

Device</SPAN>

</P>

</TD>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17161">

 </A>

<SPAN CLASS="TableHeads">

Antifuses</SPAN>

</P>

</TD>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17163">

 </A>

&nbsp;</P>

</TD>

</TR>

<TR>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17167">

 </A>

A1010</P>

</TD>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17169">

 </A>

112,000</P>

</TD>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17171">

 </A>

&nbsp;</P>

</TD>

</TR>

<TR>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17175">

 </A>

A1020</P>

</TD>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17177">

 </A>

186,000</P>

</TD>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17179">

 </A>

&nbsp;</P>

</TD>

</TR>

<TR>

<TD ROWSPAN="1" COLSPAN="1">

<P CLASS="Table">

<A NAME="pgfId=17183">

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