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<TITLE> 4.3 EPROM and EEPROM Technology</TITLE></HEAD><!--#include file="top.html"--><!--#include file="header.html"-->
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4.3 <A NAME="22793">
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EPROM and EEPROM Technology</H1>
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Altera MAX 5000 EPLDs and Xilinx EPLDs both use UV-erasable <SPAN CLASS="Definition">
electrically programmable read-only memory </SPAN>
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(<A NAME="marker=1215">
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<SPAN CLASS="Definition">
EPROM</SPAN>
) cells as their programming technology. Altera's EPROM cell is shown in <A HREF="CH04.3.htm#22055" CLASS="XRef">
Figure 4.6</A>
. The EPROM cell is almost as small as an antifuse. An EPROM transistor looks like a normal MOS transistor except it has a second, floating, gate (gate1 in <A HREF="CH04.3.htm#22055" CLASS="XRef">
Figure 4.6</A>
). Applying a programming voltage V<SUB CLASS="Subscript">
PP</SUB>
(usually greater than 12 V) to the drain of the <SPAN CLASS="Emphasis">
n-</SPAN>
channel EPROM transistor programs the EPROM cell. A high electric field causes electrons flowing toward the drain to move so fast they “jump” across the insulating gate oxide where they are trapped on the bottom, floating, gate. We say these energetic electrons are <SPAN CLASS="Emphasis">
hot</SPAN>
and the effect is known as <SPAN CLASS="Definition">
hot-electron injection</SPAN>
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or <SPAN CLASS="Definition">
avalanche injection</SPAN>
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. EPROM technology is sometimes called <SPAN CLASS="Definition">
floating-gate avalanche MOS</SPAN>
(<SPAN CLASS="Definition">
FAMOS</SPAN>
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).</P>
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FIGURE 4.6 <A NAME="22055">
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An EPROM transistor. (a) With a high (> 12 V) programming voltage, V<SUB CLASS="Subscript">
PP</SUB>
, applied to the drain, electrons gain enough energy to “jump” onto the floating gate (gate1). (b) Electrons stuck on gate1 raise the threshold voltage so that the transistor is always off for normal operating voltages. (c) Ultraviolet light provides enough energy for the electrons stuck on gate1 to “jump” back to the bulk, allowing the transistor to operate normally.</P>
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Electrons trapped on the floating gate raise the threshold voltage of the <SPAN CLASS="EmphasisPrefix">
n-</SPAN>
channel EPROM transistor (<A HREF="CH04.3.htm#22055" CLASS="XRef">
Figure 4.6</A>
b). Once programmed, an <SPAN CLASS="EmphasisPrefix">
n-</SPAN>
channel EPROM device remains <SPAN CLASS="Emphasis">
off</SPAN>
even with <SPAN CLASS="EquationVariables">
VDD</SPAN>
applied to the top gate. An unprogrammed <SPAN CLASS="EmphasisPrefix">
n-</SPAN>
channel device will turn <SPAN CLASS="Emphasis">
on</SPAN>
as normal with a top-gate voltage of <SPAN CLASS="EquationVariables">
VDD</SPAN>
. The programming voltage is applied either from a special programming box or by using on-chip charge pumps. Exposure to an ultraviolet (UV) lamp will erase the EPROM cell (<A HREF="CH04.3.htm#22055" CLASS="XRef">
Figure 4.6</A>
c). An absorbed light quantum gives an electron enough energy to jump from the floating gate. To erase a part we place it under a UV lamp (Xilinx specifies one hour within 1 inch of a 12,000 <SPAN CLASS="Symbol">
m</SPAN>
Wcm<SUP CLASS="Superscript">
–2</SUP>
source for its EPLDs). The manufacturer provides a software program that checks to see if a part is erased. You can buy an EPLD part in a windowed package for development, erase it, and use it again, or buy it in a <A NAME="marker=22598">
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nonwindowed package and program (or burn) the part once only for production. The packages get hot while they are being erased, so that windowed option is available with only ceramic packages, which are more expensive than plastic packages.</P>
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Programming an EEPROM transistor is similar to programming an UV-erasable EPROM transistor, but the erase mechanism is different. In an EEPROM transistor an electric field is also used to remove electrons from the floating gate of a programmed transistor. This is faster than using a UV lamp and the chip does not have to be removed from the system. If the part contains circuits to generate both program and erase voltages, it may use ISP.</P>
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