pll.h

DSP上重新设定CPU的频率,虽然简单,但实用

#define	PLLCSR	0x01B7C100
#define	PLLM	0x01B7C110
#define	PLLDIV0	0x01B7C114
#define	PLLDIV1	0x01B7C118
#define	PLLDIV2	0x01B7C11C
#define	PLLDIV3	0x01B7C120
#define	OSCDIV1	0x01B7C124

#define CTL0     0x01940000 //timer0 control register
#define PRD0     0x01940004 //timer0 period register
#define CNT0     0x01940008 //timer0 count register

#define MUXH     0x019c0000
#define MUXL     0x019c0004

#define PLLDIV  0
#define PLLMN   0
#define PLLRST  3
#define PLLEN   0
#define	DEN		15
#define	ODEN	15

//CTL
#define	FUNC	0
#define	INVOUT	1
#define	PWID	4
#define	GO		6
#define	HLD		7
#define	CP		8
#define	CLKSRC	9