lvbo.gfl

来自「基于FPGA的波束成型」· GFL 代码 · 共 331 行

GFL
331
字号
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# Bencher : Creating project file
boshuwave_bencher.prj
# ProjNav -> New Source -> TBW
boshuwave.vhw
boshuwave.ano
boshuwave.tfw
boshuwave.ant
# Bencher : Creating project file
boshuwave_bencher.prj
# Bencher Waveform : PDCL (jhdparse)
# ModelSim : Simulate Behavioral Verilog Model
boshuwave.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# Bencher : Creating project file
boshuwave_bencher.prj
# Bencher Waveform : PDCL (jhdparse)
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# Bencher : Creating project file
boshuwave_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
boshuwave.vhw
boshuwave.ano
boshuwave.tfw
boshuwave.ant
# ModelSim : Simulate Behavioral Verilog Model
boshuwave.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# Bencher : Creating project file
boshuwave_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
boshuwave.vhw
boshuwave.ano
boshuwave.tfw
boshuwave.ant
# ModelSim : Simulate Behavioral Verilog Model
boshuwave.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# Bencher : Creating project file
boshuwave_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
boshuwave.vhw
boshuwave.ano
boshuwave.tfw
boshuwave.ant
# ModelSim : Simulate Behavioral Verilog Model
boshuwave.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# Bencher : Creating project file
boshuwave_bencher.prj
# Bencher Waveform : PDCL (jhdparse)
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# Bencher : Creating project file
boshuwave_bencher.prj
# Bencher : Creating project file
boshuwave_bencher.prj
# Bencher : Creating project file
boshuwave_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
boshuwave.vhw
boshuwave.ano
boshuwave.tfw
boshuwave.ant
# ModelSim : Simulate Behavioral Verilog Model
boshuwave.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# Bencher : Creating project file
boshuwave_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
boshuwave.vhw
boshuwave.ano
boshuwave.tfw
boshuwave.ant
# ModelSim : Simulate Behavioral Verilog Model
boshuwave.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# Bencher : Creating project file
boshuwave_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
boshuwave.vhw
boshuwave.ano
boshuwave.tfw
boshuwave.ant
# ModelSim : Simulate Behavioral Verilog Model
boshuwave.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# XST (Creating Lso File) : 
boshuxc.lso
# xst flow : RunXST
boshuxc_summary.html
# xst flow : RunXST
boshuxc.syr
boshuxc.prj
boshuxc.sprj
boshuxc.ana
boshuxc.stx
boshuxc.cmd_log
boshuxc.ngc
boshuxc.ngr
# Bencher : Creating project file
boshuwave_bencher.prj
# Update Bencher Waveform
__projnav/updateTBW_tcl.rsp
boshuwave.vhw
boshuwave.ano
boshuwave.tfw
boshuwave.ant
# ModelSim : Simulate Behavioral Verilog Model
boshuwave.fdo
# ModelSim : Simulate Behavioral Verilog Model
vsim.wlf
# Bencher : Creating project file
boshuwave_bencher.prj
# Bencher : Creating project file
boshuwave_bencher.prj
# Bencher : Creating project file
boshuwave_bencher.prj
# Bencher Waveform : PDCL (jhdparse)
# Bencher : Creating project file
boshuwave_bencher.prj

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?