idt723v90823odd.c

IDT72v90823时隙交叉芯片的 的功能驱动代码

/* idt72v90823.c - IDT 72V90823 driver source */

/*
modification history
--------------------
*/

#include "idt72v90823.h"

TSICTL idt90823TsiCtl;

void tsiInit()
{
	  IDT72V90823REG * pTsiReg;
	  unsigned int i;
	  volatile unsigned short bpeState;
	   
      /* disable ODE and out of reset*/
      rstTSI(0xFF);
      
      idt90823TsiCtl.tsiReg = (IDT72V90823REG *)CS_TSI90823;
	
	  pTsiReg = idt90823TsiCtl.tsiReg;
	  
	  pTsiReg->cr 	= 0x0000;
	  pTsiReg->ims 	= 0x0200;
	  pTsiReg->far 	= 0x0000;
	  pTsiReg->for0 = 0x0000;
	  pTsiReg->for1 = 0x0000;
	  pTsiReg->for2 = 0x0000;
	  pTsiReg->for3 = 0x1111;

	 /* block program  initialize connect memory */
      pTsiReg->cr |= 0x2000;
	  pTsiReg->ims |= 0x1000;

	  bpeState = 1;
	  while (bpeState)
	  {
	  	bpeState = ((volatile unsigned short)(pTsiReg->ims)) & 0x1000;
	  } 	  

	  pTsiReg->cr &= ~0x2000; 
	  
	  rstTSI(0x2);
     
}

void tsiChannelConnect
(
	unsigned short srcStream,
	unsigned short srcSlot,
	unsigned short dstStream,
	unsigned short dstSlot
)
{
	 IDT72V90823REG * pTsiReg;
	 
	 unsigned short temp1,temp2;
	 
	 pTsiReg = idt90823TsiCtl.tsiReg;
	 
	 if (((srcStream < TSISTREAM)&& (srcSlot < TSISLOT))
	      && ((dstStream < TSISTREAM) && (dstSlot < TSISLOT)))
	 {
	 	 pTsiReg->cr = ((dstStream<<8) & 0x0F00);
	 
	     temp1 = (((srcStream & 0x0001)<<15) | ((srcStream & 0x000E)>>1));
	 
	 	 temp2 = srcSlot << 8;
	 	 
	 	 pTsiReg->tsiMem[dstSlot] = 0x0008 | temp1|temp2;
 	 
	 }
	 else
	 {
	 	logMsg("TSI slot or stream not exist\n",0,0,0,0,0,0);
	 }	 	 
}

void tsiChannelDisconnect
(
	unsigned short dstStream,
	unsigned short dstSlot
)
{
	 IDT72V90823REG * pTsiReg;
	 
	 pTsiReg = idt90823TsiCtl.tsiReg;
	 
	 if (((dstStream < TSISTREAM)&& (dstSlot < TSISLOT)))
	 {
	 	 pTsiReg->cr = ((dstStream<<8) & 0x0F00);
	 
	 	 pTsiReg->tsiMem[dstSlot] &= ~(0x0008|0x8007|0x7F00);	 	 								
	 }
	 else
	 {
	 	logMsg("TSI slot or stream not exist\n",0,0,0,0,0,0);
	 }	 	 
}

void tsiCrossCreate
(
	unsigned short firstStream,
	unsigned short firstSlot,
	unsigned short secondStream,
	unsigned short secondSlot
)
{
	tsiChannelDisconnect(firstStream,firstSlot);
	tsiChannelDisconnect(secondStream,secondSlot);
	
	tsiChannelConnect(firstStream,firstSlot,secondStream,secondSlot);
	tsiChannelConnect(secondStream,secondSlot,firstStream,firstSlot);	
}

void tsiCrossDestroy
(
	unsigned short firstStream,
	unsigned short firstSlot,
	unsigned short secondStream,
	unsigned short secondSlot
)
{
	tsiChannelDisconnect(firstStream,firstSlot);
	tsiChannelDisconnect(secondStream,secondSlot);
}

void dumpCross()
{
	 IDT72V90823REG * pTsiReg;
	 int i,j,first;
	 volatile unsigned short conMemTemp;
	 unsigned short srcStream;
	 unsigned short srcSlot;
	 
	 
	 first = 1;
	 
	 pTsiReg = idt90823TsiCtl.tsiReg;
	 
	 pTsiReg->cr = 0;
	 
	 for(i = 0 ;i < TSISTREAM ; i++)
	 {
	   pTsiReg->cr = i<<8;
	   
	   for (j = 0 ; j < TSISLOT ; j++)
	    {
	    	conMemTemp = pTsiReg->tsiMem[j];
	    	
	    	
	    	if (conMemTemp & 0x0008)
	    	{
	    		if(first == 1)
	    		{
	    			printf("\nIN(STREAM   , SLOT   )-->OUT(STREAM   ,SLOT   )\n");
	    			first = 0;
	    		}
	    		
    		
	    		srcStream = ((conMemTemp & 0x8000)>>15) | ((conMemTemp & 0x0007)<<1);
	    		srcSlot	  =  (conMemTemp & 0x7F00)>>8;
	    		
	    		printf("IN(       %d,      %d)-->OUT(       %d,     %d)\n",srcStream,srcSlot,i,j);
	    	}
	    }
	 }
	 printf("\n TimeSlot Dump OK\n");
}

/**************************************************************************
**									 **
**      For test                                                         **
**									 **
**************************************************************************/
void testCon()
{
 int i;
 for(i = 0;i<128;i++)
 {
   tsiChannelConnect(11,0,11,i);
   taskDelay(1);
 }
}				

void testDiscon()
{
 int i;
 for(i = 0;i<128;i++)
 {
   tsiChannelDisconnect(11,i);
   taskDelay(1);
 }
}

void testCon1(m,n)
{
 int i;
 for(i = 0;i<n;i++)
 {
   tsiChannelConnect(11,0,11,m*32 + i);
   taskDelay(1);
 }
}