idt72v90823.h

IDT72v90823时隙交叉芯片的 的功能驱动代码

/* idt72v90823.h - IDT 72V90823 driver header */

/*
modification history
--------------------
*/

#define CS_TSI90823 0x70000000
typedef struct idt72v90823reg
{
      volatile unsigned short       cr;
      volatile unsigned short       ims;
      volatile unsigned short       far;
      volatile unsigned short       for0;
      volatile unsigned short       for1;
      volatile unsigned short       for2;
      volatile unsigned short       for3;
      unsigned short                reserved[0x79];
      volatile unsigned short       tsiMem[128];
}IDT72V90823REG;


typedef struct idt72v90823channelmem
{
      volatile unsigned short       tsiConnectMem[128];
      volatile unsigned short       tsiDataMem[128];
}IDT72V90823CHANNELMEM;

typedef struct idt72v90823Mem
{
      IDT72V90823CHANNELMEM *   tsiMem[16];
}IDT72V90823MEM;

typedef struct tsiCtl
{
      IDT72V90823REG * tsiReg;
}TSICTL;

#define CRMBP           0x0020
#define CRMBP_CONMEM_PRG      0x0020

#define CRMS            0x0010
#define CRMS_CONMEM_READ      0x0000
#define CRMS_DATAMEM_READ     0x0010

#define CRSTREAM        0x000F
#define CRSTREAM_0             0x0000
#define CRSTREAM_1             0x0001
#define CRSTREAM_2             0x0002
#define CRSTREAM_3             0x0003
#define CRSTREAM_4             0x0004
#define CRSTREAM_5             0x0005
#define CRSTREAM_6             0x0006
#define CRSTREAM_7             0x0007
#define CRSTREAM_8             0x0008
#define CRSTREAM_9             0x0009
#define CRSTREAM_10            0x000A
#define CRSTREAM_11            0x000B
#define CRSTREAM_12            0x000C
#define CRSTREAM_13            0x000D
#define CRSTREAM_14            0x000E
#define CRSTREAM_15            0x000F

#define IMSBPD				0x03E0
#define IMSBPD_LPBK				0x0200
#define IMSBPD_VARIABLE_DELAY	0x0000
#define	IMSBPD_CONSTANT_DELAY	0x0100
#define	IMSBPD_PC				0x0080
#define IMSBPD_PC_CONMEM_DATA_OUTPUT	0x0080
#define IMSBPD_PC_CONMEM_SLOT_OUTPUT	0x0000
#define IMSBPD_CCO				0x0040
#define IMSBPD_CCO_BIT0			0x0000
#define IMSBPD_CCO_BIT1			0x0040
#define IMSBPD_OE				0x0020
#define IMSBPD_OE_ENABLE		0x0020
#define IMSBPD_OE_DISABLE		0x0000

#define IMSBPE					0x0010
#define IMSBPE_PROGRAM_START	0x0010
#define IMSBPE_PROGRAM_END		0x0000
#define IMSOSB					0x0008
#define IMSOSB_TRISTATE_TX		0x0000
#define IMSOSB_ENABLE_TX		0x0008
#define IMSSFE					0x0004
#define IMSSFE_START_EVALUATION	0x0004
#define IMSSFE_END_EVALUATION	0x0000
#define IMSDR					0x0003
#define	IMSDR_2048KHZ			0x0000
#define IMSDR_4096KHZ			0x0001
#define	IMSDR_8192KHZ			0x0002
		
#define FARCFE					0x1000
#define FARCFE_END_EVALUATION	0x1000
#define FARFD11					0x0800
#define	FARFD11_HIGH_CLK		0x0800
#define	FARFD11_LOW_CLK			0x0800			
#define FARFD					0x07FF

#define	FOR0DLE0				0x0001
#define FOR0OF0					0x000E
#define	FOR0DLE1				0x0010
#define FOR0OF1					0x00E0
#define	FOR0DLE2				0x0100
#define FOR0OF2					0x0E00
#define	FOR0DLE3				0x1000
#define FOR0OF3					0xE000

#define	FOR1DLE4				0x0001
#define FOR1OF4					0x000E
#define	FOR1DLE5				0x0010
#define FOR1OF5					0x00E0
#define	FOR1DLE6				0x0100
#define FOR1OF6					0x0E00
#define	FOR1DLE7				0x1000
#define FOR1OF7					0xE000

#define	FOR2DLE8				0x0001
#define FOR2OF8					0x000E
#define	FOR2DLE9				0x0010
#define FOR2OF9					0x00E0
#define	FOR2DLE10				0x0100
#define FOR2OF10				0x0E00
#define	FOR2DLE11				0x1000
#define FOR2OF11				0xE000

#define	FOR3DLE12				0x0001
#define FOR3OF12				0x000E
#define	FOR3DLE13				0x0010
#define FOR3OF13				0x00E0
#define	FOR3DLE14				0x0100
#define FOR3OF14				0x0E00
#define	FOR3DLE15				0x1000
#define FOR3OF15				0xE000

#define CONMEM_LPBK				0x8000
#define CONMEM_VC				0x4000
#define CONMEM_PC				0x2000
#define CONMEM_CCO				0x1000
#define CONMEM_OE				0x0800
#define CONMEM_STEAM			0x0780
#define CONMEM_STEAM_OFFSET		0x7
#define CONMEM_SLOT				0x007F
#define CONMEM_SLOT_OFFSET		0x0
#define CONMEM_DATA				0x00FF

#define TSISLOT					0x80
#define TSISTREAM				0x10