csr_1.h

Button 一个国外大学生毕业设计,用的是AVR单片机

//*****************************************************************************
//*****************************************************************************
//  FILENAME: CSR_1.h
//   Version: 1.1, Updated on 2005/10/13 at 09:13:22
//  Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
//
//  DESCRIPTION: CSR User Module C Language interface file
//               for the 21030 PSoC family of devices
//-----------------------------------------------------------------------------
//  Copyright (c) Cypress MicroSystems 2000-2004. All Rights Reserved.
//*****************************************************************************
//*****************************************************************************

#include <m8c.h>

#define CSR_1_ESD_DETECTION 0x0
#define CSR_1_BUTTONS_EXIST 0x7
#define CSR_1_SLIDERS_EXIST 0x0

// Low Level scan API
#pragma fastcall16 CSR_1_Start
#pragma fastcall16 CSR_1_Stop
#pragma fastcall16 CSR_1_StartScan                 // 
#pragma fastcall16 CSR_1_StopScan                  // 
#pragma fastcall16 CSR_1_GetScanStatus             // 
#pragma fastcall16 CSR_1_ClearSwitches             // 
#pragma fastcall16 CSR_1_fIsSwitchReady            // 
#pragma fastcall16 CSR_1_iReadSwitch               // 

#pragma fastcall16 CSR_1_iGetPortPin               // 
#pragma fastcall16 CSR_1_EnableSwitch              // 
#pragma fastcall16 CSR_1_DisableSwitch             //          
#pragma fastcall16 CSR_1_SetDacCurrent             // 
#pragma fastcall16 CSR_1_SetScanSpeed              // 
         
// High Level API
#pragma fastcall16 CSR_1_bUpdateBaseline           //
#pragma fastcall16 CSR_1_bGetCentroidPos           //

//-------------------------------------------------
// Prototypes of the CSR_1 API.
//-------------------------------------------------

extern void CSR_1_Start(void);                               // Proxy  
extern void CSR_1_Stop(void);                                // Proxy  
extern void CSR_1_StartScan(BYTE bStartSw, BYTE bSwCnt, BYTE bMode);  // Proxy  
extern void CSR_1_StopScan(void);                            // Proxy  
extern BYTE CSR_1_GetScanStatus(void);                       // Proxy  
extern void CSR_1_ClearSwitches(void);                       // Proxy  
extern BYTE CSR_1_fIsSwitchReady(void);                      // Proxy  
extern int  CSR_1_iReadSwitch(BYTE bSwitch);                 // Proxy  

extern int  CSR_1_iGetPortPin(BYTE bSwitchNum);              // Proxy  
extern void CSR_1_EnableSwitch(BYTE bMask, BYTE bPort);      // Proxy  
extern void CSR_1_DisableSwitch(BYTE bMask, BYTE bPort);     // Proxy  
extern void CSR_1_SetDacCurrent(BYTE bValue, BYTE bRange);   // Proxy  
extern void CSR_1_SetScanSpeed(BYTE bDivider);               // Proxy  

//-------------------------------------------------
// High level functions
//-------------------------------------------------

extern BYTE CSR_1_bUpdateBaseline(BYTE bSwGroup);  // Proxy  
#if CSR_1_SLIDERS_EXIST
extern BYTE CSR_1_bGetCentroidPos(BYTE bSwGroup); // Proxy
#endif
//--------------------------------------------------
// Variables for CSR_1.
//--------------------------------------------------
extern BYTE CSR_1_bfStatus;

extern unsigned int CSR_1_iaSwResult[];
extern unsigned int CSR_1_iaSwBaseline[];
extern unsigned int CSR_1_iaSwDiff[];
extern BYTE CSR_1_baSwOnMask[];
extern BYTE CSR_1_bBaselineUpdateTimer;
extern BYTE CSR_1_fIsBLValid;

#if CSR_1_BUTTONS_EXIST
extern BYTE CSR_1_baBtnFThreshold[];
#endif

#if CSR_1_ESD_DETECTION
extern int CSR_1_iaSwDeriv[];
extern BYTE	CSR_1_baBaselineResetCounter[];
extern BYTE CSR_1_baESDDebounce[];
extern BYTE CSR_1_bAbnormalTimer;
#endif

#if CSR_1_SLIDERS_EXIST
extern BYTE CSR_1_bCtrdPos;
extern BYTE CSR_1_baCtrdPkPos[];
extern unsigned int CSR_1_iaCtrdPkValue[];
#endif

//--------------------------------------------------
// Constants for CSR_1 API's.
//--------------------------------------------------

#define CSR_1_CONTROL_REG_START_BIT            ( 0x01 )


//--------------------------------------------------
// Constants for CSR_1 user defined values
//--------------------------------------------------


// Scan Modes
#define CSR_1_SCAN_CONTINUOUS                      0x01
#define CSR_1_SCAN_ONCE                            0x00

// Scan Status
#define CSR_1_SCAN_ACTIVE                          0x10
#define CSR_1_SCAN_SET_COMPLETE                    0x20

// Sizes
#define CSR_1_ButtonCount                          0x7
#define CSR_1_SliderCount                          0x0
#define CSR_1_TotalSwitchCount                     0x7

// DAC Ranges
#define CSR_1_DAC_LOW                              0x00
#define CSR_1_DAC_HIGH                             0x01

// Scan Speed
#define CSR_1_Scan_500HZ                           186  
#define CSR_1_Scan_1KHZ                            93   
#define CSR_1_Scan_2KHZ                            46  

// Scan Mode 
#define CSR_1_Method                               1
#define CSR_1_Method_Frequency                     0
#define CSR_1_Method_Period                        1



//-------------------------------------------------
// Register Addresses for CSR_1
//-------------------------------------------------
#pragma ioport  CSR_1_ACE_CONTROL1_REG: 0x072              // Analog block control Register 1
BYTE            CSR_1_ACE_CONTROL1_REG;
#pragma ioport  CSR_1_ACE_CONTROL2_REG: 0x073              // Analog block control Register 2
BYTE            CSR_1_ACE_CONTROL2_REG;

#pragma ioport  CSR_1_PWM_FUNC_REG: 0x120                  // PWM Function Register 
BYTE            CSR_1_PWM_FUNC_REG;
#pragma ioport  CSR_1_PWM_IN_REG:   0x121                  // PWM Input Register    
BYTE            CSR_1_PWM_IN_REG;
#pragma ioport  CSR_1_PWM_OUT_REG:  0x122                  // PWM Output Register
BYTE            CSR_1_PWM_OUT_REG;
#pragma ioport  CSR_1_PWM_COUNTER_REG:  0x020              // PWM Counter Register
BYTE            CSR_1_PWM_COUNTER_REG;
#pragma ioport  CSR_1_PWM_PERIOD_REG:   0x021              // PWM Period Refister
BYTE            CSR_1_PWM_PERIOD_REG;
#pragma ioport  CSR_1_PWM_COMPARE_REG:  0x022              // PWM Compare Register
BYTE            CSR_1_PWM_COMPARE_REG;
#pragma ioport  CSR_1_PWM_CONTROL_REG:  0x023              // PWM Control Register
BYTE            CSR_1_PWM_CONTROL_REG;

#pragma ioport  CSR_1_CTR_COUNTER_LSB_REG:  0x024          // Count register LSB
BYTE            CSR_1_CTR_COUNTER_LSB_REG;
#pragma ioport  CSR_1_CTR_COUNTER_MSB_REG:  0x028          // Count register MSB
BYTE            CSR_1_CTR_COUNTER_MSB_REG;
#pragma ioport  CSR_1_CTR_PERIOD_LSB_REG:   0x025          // Period register LSB
BYTE            CSR_1_CTR_PERIOD_LSB_REG;
#pragma ioport  CSR_1_CTR_PERIOD_MSB_REG:   0x029          // Period register MSB
BYTE            CSR_1_CTR_PERIOD_MSB_REG;
#pragma ioport  CSR_1_CTR_COMPARE_LSB_REG:  0x026          // Compare register LSB
BYTE            CSR_1_CTR_COMPARE_LSB_REG;
#pragma ioport  CSR_1_CTR_COMPARE_MSB_REG:  0x02a          // Compare register MSB
BYTE            CSR_1_CTR_COMPARE_MSB_REG;
#pragma ioport  CSR_1_CTR_CONTROL_LSB_REG:  0x027          // Control register LSB
BYTE            CSR_1_CTR_CONTROL_LSB_REG;
#pragma ioport  CSR_1_CTR_CONTROL_MSB_REG:  0x02b          // Control register MSB
BYTE            CSR_1_CTR_CONTROL_MSB_REG;
#pragma ioport  CSR_1_CTR_FUNC_LSB_REG: 0x124              // Function register LSB
BYTE            CSR_1_CTR_FUNC_LSB_REG;
#pragma ioport  CSR_1_CTR_FUNC_MSB_REG: 0x128              // Function register MSB
BYTE            CSR_1_CTR_FUNC_MSB_REG;
#pragma ioport  CSR_1_CTR_INPUT_LSB_REG:    0x125          // Input register LSB
BYTE            CSR_1_CTR_INPUT_LSB_REG;
#pragma ioport  CSR_1_CTR_INPUT_MSB_REG:    0x129          // Input register MSB
BYTE            CSR_1_CTR_INPUT_MSB_REG;
#pragma ioport  CSR_1_CTR_OUTPUT_LSB_REG:   0x126          // Output register LSB
BYTE            CSR_1_CTR_OUTPUT_LSB_REG;
#pragma ioport  CSR_1_CTR_OUTPUT_MSB_REG:   0x12a          // Output register MSB
BYTE            CSR_1_CTR_OUTPUT_MSB_REG;


//-------------------------------------------------
// CSR_1 Macro 'Functions'
//-------------------------------------------------

#define CSR_1_Start_M \
   ( CSR_1_CTR_CONTROL_LSB_REG |=  CSR_1_CONTROL_REG_START_BIT )

#define CSR_1_Stop_M  \
   ( CSR_1_CTR_CONTROL_LSB_REG &= ~CSR_1_CONTROL_REG_START_BIT )

#define CSR_1_EnableInt_M   \
   M8C_EnableIntMask(  CSR_1_INT_REG, CSR_1_INT_MASK )

#define CSR_1_DisableInt_M  \
   M8C_DisableIntMask( CSR_1_INT_REG, CSR_1_INT_MASK )


// end of file CSR_1.h